Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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10/13/1994 | DE4339179A1 Verfahren und Vorrichtung zum Verhindern einer Signalverstümmelung auf einem gemeisamen Bus eines Computers Method and apparatus for preventing signal mutilation on a bus of a computer gemeisamen |
10/13/1994 | DE4326740C1 Architecture for a computation system |
10/13/1994 | CA2159001A1 Generic managed object model for lan domain |
10/12/1994 | EP0619548A1 Interface circuit between a control bus and an integrated circuit suitable for two different protocol standards |
10/12/1994 | EP0619547A1 A method of requesting data and apparatus therefor |
10/12/1994 | EP0619546A1 Programmable memory controller and method for configuring same |
10/12/1994 | EP0619061A1 Receiver/decoder for a serial network of i/o devices |
10/12/1994 | EP0364558B1 Data communications system and method therefor |
10/12/1994 | EP0213183B1 Dual function i/o controller |
10/11/1994 | US5355507 Computer system for arbitrating the operation of a built-in modem and external SIO circuit |
10/11/1994 | US5355499 Interruption circuit operable at a high speed |
10/11/1994 | US5355489 Bios load for a personal computer system having a removable processor card |
10/11/1994 | US5355460 In-memory preprocessor for compounding a sequence of instructions for parallel computer system execution |
10/11/1994 | US5355458 Microcomputer with table address forcing for different size memories |
10/11/1994 | US5355455 Method and apparatus for avoiding deadlock in a computer system with two or more protocol-controlled buses interconnected by a bus adaptor |
10/11/1994 | US5355453 For use with a data network and a mass storage device |
10/11/1994 | US5355452 Dual bus local area network interfacing system |
10/11/1994 | US5355391 High speed bus system |
10/11/1994 | US5355364 Method of routing electronic messages |
10/05/1994 | EP0618713A2 Real-time fraud monitoring system in a telecommunication network |
10/05/1994 | EP0618709A2 Memory manager for a multichannel network interface |
10/05/1994 | EP0618708A2 Locating resources in computer networks having cache server nodes |
10/05/1994 | EP0618681A2 Driver for bus circuit of motor vehicle multiplex communications system |
10/05/1994 | EP0618537A1 System and method for interleaving status information with data transfers in a communications adapter |
10/05/1994 | EP0618536A1 Interrupt arrangement |
10/05/1994 | EP0617814A1 Open office directory database views |
10/04/1994 | US5353429 Cache memory systems that accesses main memory without wait states during cache misses, using a state machine and address latch in the memory controller |
10/04/1994 | US5353423 Memory controller for use with write-back cache system and multiple bus masters coupled to multiple buses |
10/04/1994 | US5353417 Personal computer with bus interface controller coupled directly with local processor and input/output data buses and for anticipating memory control changes on arbitration for bus access |
10/04/1994 | US5353416 CPU lock logic for corrected operation with a posted write array |
10/04/1994 | US5353414 Bus lock control apparatus capable of controlling without stopping bus arbiters |
10/04/1994 | US5353411 Operating system generation method |
10/04/1994 | US5353399 Method and system for selecting devices in information networks, including inputting/outputting data to a specified device selected by pointing to a corresponding indicator on a screen |
10/04/1994 | US5353398 Group working system having operator discriminating function |
10/04/1994 | US5353284 Data transmission system |
10/04/1994 | US5352877 Non-contact transaction system with token presence detection |
09/29/1994 | WO1994022271A1 Isdn adapter board |
09/29/1994 | WO1994022259A1 Method and system for managing telecommunications such as telephone calls |
09/29/1994 | WO1994022102A1 A chassis for a multiple computer system |
09/29/1994 | WO1994022093A2 Method and apparatus for dynamic, multispeed bus architecture with speed messages independent of data signal transfers |
09/29/1994 | WO1994022090A1 Intelligent memory architecture |
09/29/1994 | WO1994022089A1 Peripheral device control through integrated drive electronics |
09/29/1994 | WO1994022088A1 Multiple computer system |
09/29/1994 | WO1994022087A1 System for reverse address resolution for remote network device |
09/29/1994 | WO1994018627A3 Network adapter with host interrupt and indication management |
09/29/1994 | CA2157866A1 Isdn adapter board |
09/28/1994 | EP0617376A1 Upgradeable data processing system |
09/28/1994 | EP0617373A2 A method and system for parallel, system managed storage for objects on multiple servers |
09/28/1994 | EP0617369A1 I/O memory card and I/O memory card control method |
09/28/1994 | EP0617368A1 Arbitration process for controlling data flow through an I/O controller |
09/28/1994 | EP0617367A2 System management interrupt address bit correction circuit |
09/28/1994 | EP0617366A1 Memory controller having all DRAM address and control signals provided synchronously from a single device |
09/28/1994 | EP0617365A1 Fully pipelined and highly concurrent memory controller |
09/28/1994 | EP0617364A2 Computer system which overrides write protection status during execution in system management mode |
09/28/1994 | EP0617362A1 Data back-up in data processing system |
09/28/1994 | EP0617358A1 Disk storage apparatus and method for converting random writes to sequential writes while retaining physical clustering on disk |
09/28/1994 | EP0616710A1 Signal handling system with a shared data memory |
09/28/1994 | EP0616708A1 System management method and apparatus |
09/28/1994 | EP0591451A4 Method and apparatus for transferring data between a host device and a plurality of portable computers |
09/28/1994 | CN1092929A Method and apparatus of communication |
09/27/1994 | CA2110134A1 Processor-based smart packet memory interface |
09/21/1994 | EP0616477A1 Least cost routing arrangement in a telecommunication network |
09/21/1994 | EP0616455A2 Computer network using data compression |
09/21/1994 | EP0616287A1 Method for controlling the polarity of a digital signal and integrated circuits for implementing this method |
09/21/1994 | EP0615640A1 Reservation overriding normal prioritization of microprocessors in multiprocessing computer systems |
09/21/1994 | CN1092579A Switched circuit connection management over public data networks for wide area networks |
09/21/1994 | CN1092539A Multiple computer system |
09/21/1994 | CN1092538A A chassis for a multiple computer system |
09/20/1994 | US5349693 Control circuit for digital data transfer |
09/20/1994 | US5349690 Fair arbitration scheme for arbitrating between multiple nodes in a computer system seeking control of a common bus |
09/20/1994 | US5349685 Multipurpose bus interface utilizing a digital signal processor |
09/20/1994 | US5349683 Bidirectional FIFO with parity generator/checker |
09/20/1994 | US5349679 Communication control unit for selecting a control mode of data communication and selectively bypassing an interprocessor interface |
09/20/1994 | US5349675 Computer network |
09/20/1994 | US5349674 Automated enrollment of a computer system into a service network of computer systems |
09/20/1994 | US5349673 Master/slave system and its control program executing method |
09/20/1994 | US5349667 Interrupt control system for microprocessor for handling a plurality of maskable interrupt requests |
09/20/1994 | US5349666 Reduced power line fluctuation/noise circuit by increasing impedance level when number of bus lines simultaneously change state exceeds the predetermined number |
09/20/1994 | US5349657 Method of automating uploading of help panels |
09/20/1994 | US5349647 Input/output coprocessor for printing machine |
09/20/1994 | US5349644 Distributed intelligence engineering casualty and damage control management system using an AC power line carrier-current lan |
09/20/1994 | US5349643 System and method for secure initial program load for diskless workstations |
09/20/1994 | US5349621 Method and circuit arrangement for transmitting data blocks through a bus system |
09/20/1994 | US5349583 Multi-channel token ring |
09/20/1994 | US5349564 Multi-port RAM having means for providing selectable interrupt signals |
09/20/1994 | US5349449 Image data processing circuit and method of accessing storing means for the processing circuit |
09/20/1994 | US5349343 Flexible module interconnect system |
09/15/1994 | WO1994021074A1 Network communication system |
09/15/1994 | WO1994020907A1 A bus interconnect circuit including port control logic for a multiple node communication network |
09/14/1994 | EP0615370A1 Network communication system |
09/14/1994 | EP0615368A2 Multi-media integrated message arrangement |
09/14/1994 | EP0615362A1 Network analysis method |
09/14/1994 | EP0615196A1 Communication device between at least one client and at least one server, method of using the device and use of the device |
09/14/1994 | EP0615194A1 A data processing system using an address/data bus system |
09/14/1994 | EP0615185A1 Integrated computer terminal |
09/14/1994 | EP0370018B1 Apparatus and method for determining access to a bus |
09/13/1994 | US5347643 Bus system for coordinating internal and external direct memory access controllers |
09/13/1994 | US5347638 Method and apparatus for reloading microinstruction code to a SCSI sequencer |
09/13/1994 | US5347637 Modular input/output system for supercomputers |
09/13/1994 | US5347634 System and method for directly executing user DMA instruction from user controlled process by employing processor privileged work buffer pointers |