Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
12/1994
12/14/1994EP0628910A1 Error capture logic for peripheral bus in multiple bus computer system
12/14/1994EP0628908A1 PCMCIA interface using shared memory
12/14/1994EP0628185A1 Distributed data processing system
12/14/1994EP0418288B1 Computer and telephone apparatus with user friendly computer interface and enhanced integrity features
12/13/1994US5373467 Solid state memory device capable of providing data signals on 2N data lines or N data lines
12/13/1994US5373204 Self-timed clocking transfer control circuit
12/08/1994WO1994028550A1 Dynamic random access memory system
12/08/1994WO1994028487A1 Process and arrangement for operating a bus system
12/08/1994WO1994028484A1 Multiplexing device for a redundant channel bus
12/07/1994EP0627835A1 Improved network layer packet structure
12/07/1994EP0627831A2 Configuration of intersystem channels
12/07/1994EP0627823A2 Communication protocol for communicating control data
12/07/1994EP0627689A2 Back-to-back data transfers in a multiplexed bus system
12/07/1994EP0627688A1 Provision of accurate and complete communication between different bus architectures
12/07/1994EP0627687A1 Arrangement for expanding the device capacity of a bus
12/07/1994EP0627686A1 System management information setting unit
12/07/1994EP0627143A1 Management in telecom and open systems
12/07/1994EP0627102A1 System for data transmission between a computer bus and a network
12/07/1994EP0627101A1 Control system
12/07/1994CN1026926C Data processing apparatus for dynamically setting timings in a dynamic memory system
12/06/1994US5371897 Method for requesting identification of a neighbor node in a data processing I/O system
12/06/1994US5371893 Look-ahead priority arbitration system and method
12/06/1994US5371892 Method for configuring a computer bus adapter circuit board without the use of jumpers or switches
12/06/1994US5371880 Bus synchronization apparatus and method
12/06/1994US5371869 Micro-controller unit for selectively accessing an internal memory or an external extended memory using a read/write terminal
12/06/1994US5371863 High speed processor bus extension
12/06/1994US5371861 Personal computer with small computer system interface (SCSI) data flow storage controller capable of storing and processing multiple command descriptions ("threads")
12/06/1994US5371859 System for providing data communications between a plurality of measurement data generating/receiving modules connected to a common communication bus
12/06/1994US5371857 Input/output interruption control system for a virtual machine
12/06/1994US5371856 Transfer data storage system
12/06/1994US5371855 For use in a data processing system
12/06/1994US5371749 Apparatus for preventing an error operation during part withdrawal
12/06/1994US5371743 On-line module replacement in a multiple module data processing system
12/06/1994US5371740 Method for data transmission over an internal bus of a workstation, apparatus with an internal bus for implementing the method, and an adapter circuit for the internal bus
12/06/1994US5371736 Universal protocol programmable communications interface
12/06/1994US5371733 Method and apparatus for centralized determination of virtual transmission delays in networks of counter-synchronized communication devices
11/1994
11/30/1994EP0626659A1 Apparatus, system and method for distributed processing
11/30/1994EP0626635A2 Improved graphical user interface with method and apparatus for interfacing to remote devices
11/30/1994EP0626631A1 Clock generator
11/30/1994EP0626083A1 An isdn audiovisual teleservices interface subsystem
11/30/1994CN2184225Y Parallet port software protecter on PC computer
11/30/1994CN1026831C Personal computer with local memory expansion capability
11/30/1994CN1026827C Multi-play card switching method
11/29/1994US5369777 Integrated digital processing apparatus having a single biodirectional data bus for accommodating a plurality of peripheral devices connected to a plurality of external buses
11/29/1994US5369769 Method and circuitry for selecting a free interrupt request level from a multiplicity of interrupt request levels in a personal computer system
11/29/1994US5369767 Servicing interrupt requests in a data processing system without using the services of an operating system
11/29/1994US5369760 Data processing system
11/29/1994US5369748 Bus arbitration in a dual-bus architecture where one bus has relatively high latency
11/29/1994US5369747 In a data processing system
11/29/1994US5369705 Multi-party secure session/conference
11/29/1994US5369672 Interface circuit capable of performing exact data transfer
11/29/1994US5369651 Memory system for performing partial word write operations
11/29/1994US5369638 Line interface for high-speed transmission line
11/29/1994US5369508 Information processing methodology
11/29/1994CA2124618A1 Method and apparatus for intializing multiple bus networks in an information handling system
11/29/1994CA2124614A1 Method and apparatus for providing back-to-back data transfers in an information handling system having a multiplexed bus
11/29/1994CA2124032A1 Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus
11/29/1994CA2124029A1 Method and apparatus for providing accurate and complete communications between different bus architectures in an information handling system
11/24/1994WO1994027411A1 Method for resolving conflicts among entities in a distributed system
11/24/1994WO1994027399A2 Telecom adapter for interfacing computing devices to the analog telephone network
11/24/1994WO1994027268A1 Gps explorer
11/24/1994WO1994027225A1 Control module for reducing ringing in digital signals on a transmission line
11/24/1994WO1994027224A1 Apparatus and method for automatic recognition and configuration of a peripheral device
11/24/1994WO1994027223A1 Identification and self-configuration of serially-connected communications devices
11/24/1994WO1994027206A1 Location-triggered interactive data retrieval system
11/24/1994WO1994015269A3 Apparatus, system and method for facilitating communication between components having different byte orderings
11/24/1994CA2662810A1 Gps explorer
11/24/1994CA2161018A1 Telecom adapter for interfacing computing devices to the analog telephone network
11/23/1994EP0625858A1 Video server memory management method
11/23/1994EP0625857A1 Video server
11/23/1994EP0625838A2 Token ring network
11/23/1994EP0625753A1 Dynamically programmable bus arbiter with provisions for historical feedback
11/23/1994EP0625751A1 Method of transmitting safe information on a bus
11/23/1994EP0625750A2 Methods and apparatus for making and using distributed applications
11/23/1994EP0625274A1 Scalable tree structured high speed i/o subsystem architecture
11/23/1994CN1026733C Multi-medla signal processor computer system
11/22/1994US5367695 Bus-to-bus interface for preventing data incoherence in a multiple processor computer system
11/22/1994US5367689 Apparatus for strictly ordered input/output operations for interrupt system integrity
11/22/1994US5367681 Method and apparatus for routing messages to processes in a computer system
11/22/1994US5367679 Round robin scheduler using a scheduler carry operation for arbitration
11/22/1994US5367678 Multiprocessor system having statically determining resource allocation schedule at compile time and the using of static schedule with processor signals to control the execution time dynamically
11/22/1994US5367670 Computer system manager for monitoring events and operating parameters and generating alerts
11/22/1994US5367649 Programmable controller
11/22/1994US5367648 General purpose memory access scheme using register-indirect mode
11/22/1994US5367647 Apparatus and method for achieving improved SCSI bus control capacity
11/22/1994US5367646 Universal device for coupling a computer bus to a controller of a group of peripherals
11/22/1994US5367644 Communication system
11/22/1994US5367643 Generic high bandwidth adapter having data packet memory configured in three level hierarchy for temporary storage of variable length data packets
11/22/1994US5367641 MIL-STD-1553 interface device having a bus controller minor frame timer
11/22/1994US5367639 Method and apparatus for dynamic chaining of DMA operations without incurring race conditions
11/22/1994US5367638 Digital data processing circuit with control of data flow by control of the supply voltage
11/22/1994US5367635 Network management agent with user created objects providing additional functionality
11/22/1994US5367618 Document processing apparatus
11/22/1994US5367521 Telecommunications packet switching system
11/22/1994CA2121612A1 Methods and apparatus for making and using distributed applications
11/21/1994CA2123923A1 Pcmcia interface using shared memory
11/20/1994CA2123761A1 Video server memory management method
11/20/1994CA2123760A1 Video server
11/19/1994CA2096469A1 Circuit for generating a stretched clock in quarter-cycle increments
11/17/1994EP0624964A1 Database access