Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
11/1993
11/03/1993EP0568455A1 Superconducting input interface circuit for superconducting circuit
11/02/1993US5258942 Balanced two-level delay propagation all one detector compiler
11/02/1993US5258668 Programmable logic array integrated circuits with cascade connections between logic modules
11/02/1993US5258667 Logic circuit for controlling a supply on drive pulses to regulate an output level
11/02/1993US5258666 CMOS clocked logic decoder
11/02/1993US5258665 AC Miller-Killer circuit for L→Z transitions
11/02/1993US5258661 High noise tolerance receiver
11/02/1993US5258625 Interband single-electron tunnel transistor and integrated circuit
11/02/1993CA1323910C Mos analog nor amplifier
10/1993
10/28/1993WO1993021572A1 Electrical current source circuitry for a bus
10/28/1993DE4213623A1 Inverter switch stage using bipolar transistor totem-pole circuit - has controlled current source FET supplying current to base of bipolar transistor when transistor is conductive, and preventing current when transistor is off, to provide TTL output.
10/26/1993US5257287 Automatic polarity detection and correction method and apparatus employing linkpulses
10/26/1993US5256918 Programmable logic circuit
10/26/1993US5256917 ECL logic gate with voltage protection
10/26/1993US5256916 TTL to CMOS translating input buffer circuit with dual thresholds for high dynamic current and low static current
10/26/1993US5256915 Compound semiconductor integrated circuit
10/26/1993US5256914 Short circuit protection circuit and method for output buffers
10/21/1993DE4312050A1 MOSFET output circuit with open drain - reduces rate of change of control voltage when changed from high level to low level
10/19/1993US5255240 One stage word line decoder/driver with speed-up Darlington drive and adjustable pull down
10/19/1993US5255222 Output control circuit having continuously variable drive current
10/19/1993US5255221 Fully configurable versatile field programmable function element
10/19/1993US5255203 Interconnect structure for programmable logic device
10/19/1993US5254891 BICMOS ECL circuit suitable for delay regulation
10/19/1993US5254887 ECL to BiCMIS level converter
10/19/1993US5254886 Clock distribution scheme for user-programmable logic array architecture
10/19/1993US5254885 Bi-CMOS logic circuit with feedback
10/19/1993US5254883 Electrical current source circuitry for a bus
10/19/1993US5254882 Method and device for processing two separately referenced signal levels
10/14/1993WO1993020520A1 Data bus using open drain drivers and differential receivers together with distributed termination impedances
10/14/1993WO1992017938A3 Differential driver/receiver circuit
10/13/1993EP0565240A1 Differential signal receiver circuit and method
10/13/1993EP0564791A1 Potential-free data interface
10/12/1993US5252867 Self-compensating digital delay semiconductor device with selectable output delays and method therefor
10/12/1993US5252863 Drive circuit for use in a semiconductor integrated circuit
10/12/1993US5252862 BICMOS logic gate
10/12/1993CA1323080C Low-noise transmission line termination circuitry
10/07/1993DE4304262C1 Multiplexer device using current switches - uses two parallel transistor for each switch, controlled by selection signal and third transistor providing circuit output
10/06/1993EP0564390A2 High-speed bipolar-field effect transistor (BI-FET) circuit
10/06/1993EP0564204A2 Semiconductor device
10/05/1993US5250860 Input voltage level conversion circuitry
10/05/1993US5250859 Low power multifunction logic array
10/05/1993US5250858 Double-edge triggered memory device and system
10/05/1993US5250857 Dynamic logic circuit with reduced operating current
10/05/1993US5250856 Differential input buffer-inverters and gates
10/05/1993US5250855 AND gate
09/1993
09/30/1993DE4308518A1 Combined bipolar transistor and MOSFET amplifier for ECL-CMOS level shifting circuit - uses two bipolar transistors with series MOSFETs between two opposing potentials providing amplifier inputs and outputs
09/29/1993EP0562904A1 Process and device for adjusting a delay in several ranges
09/29/1993EP0562884A2 Basic DCVS circuits with dual function load circuits
09/29/1993EP0562881A2 Wired-or logic circuit
09/29/1993EP0562751A2 Logic device
09/29/1993EP0562719A1 An integrated circuit device made by compound semiconductor
09/28/1993US5248909 High speed
09/28/1993US5248907 Output buffer with controlled output level
09/28/1993US5248906 High speed CMOS output buffer circuit minimizes output signal oscillation and steady state current
09/23/1993DE4308508A1 Bidirectional signal transmission system for computer system - has logic units with ECL transmitter stages providing impedance values related to characteristics line impedance for optimum transmission
09/23/1993DE4208731A1 Integrated circuit with transfer element e.g. for DRAM word-line driver - has gate oxide thickness of transfer element greater than thickness of CMOS circuit block
09/23/1993DE4208729A1 Input signal level converter to higher output level - has drain-source path of each first MOS Fets of p- and n- channel type in series
09/22/1993EP0561579A2 Coin box structure
09/21/1993US5247473 Method and apparatus for performing a multiple-input optical arithmetic comparison
09/21/1993US5247214 Bi-cmos out buffer circuit for cmos logic
09/21/1993US5247213 Programmable sense amplifier power reduction
09/21/1993US5247212 Complementary logic input parallel (clip) logic circuit family
09/21/1993US5247195 PLDs with high drive capability
09/16/1993WO1993018587A1 Circuit, counter and frequency synthesizer with adjustable bias current
09/16/1993WO1993018586A1 Integrated logic circuit with functionally flexible input/output macrocells
09/15/1993EP0389577B1 Circuits for exclusive disjunction of two signals
09/14/1993US5245228 Level inverter circuit
09/14/1993US5245227 Versatile programmable logic cell for use in configurable logic arrays
09/14/1993US5245226 Output logic macrocell
09/14/1993US5245225 High performance BiFET complementary emitter follower logic circuit
09/14/1993US5245224 Level conversion circuitry for a semiconductor integrated circuit
09/14/1993US5245222 Method and apparatus for buffering electrical signals
09/09/1993DE4215649A1 Bicmos-treiberschaltung BiCMOS driver circuit
09/08/1993EP0559322A2 Structure and method for providing a reconfigurable emulation circuit
09/08/1993CN1022077C Semiconductor integrated circuit
09/07/1993US5243623 Switchable multi-mode transceiver interface device
09/07/1993US5243238 Configurable cellular array
09/07/1993US5243237 Digital logic circuit
09/07/1993US5243231 Supply independent bias source with start-up circuit
09/07/1993US5243229 Digitally controlled element sizing
09/07/1993US5243206 Logic circuit using vertically stacked heterojunction field effect transistors
09/02/1993WO1993017501A1 Double-edge triggered memory device and system
09/02/1993WO1993017499A1 Bi-cmos output circuit
09/02/1993WO1993017498A1 BiCMOS LOGIC CIRCUIT
09/02/1993WO1993017497A1 Circuit for filtering asynchronous metastability of cross-coupled logic gates
09/02/1993CA2127474A1 Bicmos logic circuit
09/01/1993EP0558244A1 Method and apparatus for buffering electrical signals
09/01/1993EP0557748A2 Synchronous digital circuit
09/01/1993EP0557668A1 Low power TTL/CMOS receiver circuit
09/01/1993EP0557342A1 Zero overhead self-timed iterative logic
09/01/1993EP0312573B1 Backplane bus
08/1993
08/31/1993USRE34363 Configurable electrical circuit having configurable logic elements and configurable interconnects
08/31/1993US5241564 Low noise, high performance data bus system and method
08/31/1993US5241511 BiCMOS memory word line driver
08/31/1993US5241502 Data output buffer circuit with precharged bootstrap circuit
08/31/1993US5241265 Logic function circuit with an array of data stores and their circuit testing
08/31/1993US5241225 Level conversion circuit having improved control and speed of switching from high to low level converter outputs
08/31/1993US5241224 High-density erasable programmable logic device architecture using multiplexer interconnections
08/31/1993US5241223 NORi circuit/bias generator combination compatible with CSEF circuits
08/25/1993EP0557080A1 Output buffer with controlled output level
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