| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 05/31/1994 | US5317698 FPGA architecture including direct logic function circuit to I/O interconnections |
| 05/31/1994 | US5317214 Interface circuit having differential signal common mode shifting means |
| 05/31/1994 | US5317213 Level converter with delay circuitry used to increase switching speed |
| 05/31/1994 | US5317212 Dynamic control of configurable logic |
| 05/31/1994 | US5317211 Programmable pin for use in programmable logic devices |
| 05/31/1994 | US5317210 I/O cell for programmable logic device providing latched, unlatched, and fast inputs |
| 05/31/1994 | US5317209 Dynamic three-state bussing capability in a configurable logic array |
| 05/31/1994 | US5317208 Integrated circuit employing inverse transistors |
| 05/31/1994 | US5317207 Integrated circuit having reduced electromagnetic emissions an integrated circuit including a variable impedance for reduced electromagnetic emission |
| 05/31/1994 | US5317206 Buffer circuit using capacitors to control the slow rate of a driver transistor |
| 05/31/1994 | US5317204 Mitigating the adverse effects of charge sharing in dynamic logic circuits |
| 05/31/1994 | US5317201 Logical circuit for detecting a potential |
| 05/31/1994 | US5317183 Substrate noise coupling reduction for VLSI applications with mixed analog and digital circuitry |
| 05/31/1994 | CA2022056C Distributed memory architecture for a configurable logic array and method for using distributed memory |
| 05/26/1994 | WO1994011950A1 Programmable logic devices and configurable logic networks |
| 05/26/1994 | WO1994011949A1 Programmable logic networks |
| 05/25/1994 | EP0598495A2 Programmable logic devices with spare circuits for replacement of defects |
| 05/25/1994 | EP0598475A2 Apparatus and method for protecting a programmable logic device from undesired input overshoot voltages |
| 05/25/1994 | EP0597985A1 Vehicle light, windshield wiper control system |
| 05/24/1994 | US5315590 Selectable repeater port reconnection method and apparatus |
| 05/24/1994 | US5315230 Temperature compensated voltage reference for low and wide voltage ranges |
| 05/24/1994 | US5315187 Self-controlled output stage with low power bouncing |
| 05/24/1994 | US5315180 Synchronizing interface circuit between semiconductor element circuit and a Josephson junction element circuit |
| 05/24/1994 | US5315179 BICMOS level converter circuit |
| 05/24/1994 | US5315178 IC which can be used as a programmable logic cell array or as a register file |
| 05/24/1994 | US5315177 One time programmable fully-testable programmable logic device with zero power and anti-fuse cell architecture |
| 05/24/1994 | US5315176 Differential ECL circuit |
| 05/24/1994 | US5315174 Programmable output slew rate control |
| 05/24/1994 | US5315173 Data buffer circuit with delay circuit to increase the length of a switching transition period during data signal inversion |
| 05/24/1994 | US5315105 Optical operational memory device |
| 05/18/1994 | EP0597590A1 Output buffer circuits |
| 05/18/1994 | EP0584265A4 Null convention speed independent logic |
| 05/17/1994 | US5313119 Field programmable gate array |
| 05/17/1994 | US5313118 High-speed, low-noise, CMOS output driver |
| 05/17/1994 | US5313117 Semiconductor logic circuit using two n-type negative resistance devices |
| 05/17/1994 | US5313116 Semiconductor integrated circuit device having bipolar transistor and field effect transistor |
| 05/17/1994 | CA2022029C Automatic system for adjusting the output impedance of fast cmos drivers |
| 05/11/1994 | WO1994010754A1 Improved configurable cellular array |
| 05/11/1994 | EP0596864A2 Speed enhancement technique for CMOS circuits |
| 05/11/1994 | EP0596691A2 Multi-function resonant tunneling logic gate and method of performing binary and multi-valued logic |
| 05/11/1994 | EP0596658A1 Low-skew signal routing in a programmable array |
| 05/11/1994 | EP0596637A1 Input buffer circuit |
| 05/11/1994 | EP0596228A1 Oscillatorless substrate bias generator |
| 05/11/1994 | CA2147363A1 Improved configurable cellular array |
| 05/10/1994 | US5311482 Semiconductor integrated circuit |
| 05/10/1994 | US5311476 Semiconductor memory, components and layout arrangements thereof, and method of testing the memory |
| 05/10/1994 | US5311084 Integrated circuit buffer with controlled rise/fall time |
| 05/10/1994 | US5311083 Very low voltage inter-chip CMOS logic signaling for large numbers of high-speed output lines each associated with large capacitive loads |
| 05/10/1994 | US5311082 CMOS to ECL level translator |
| 05/10/1994 | US5311081 Electronic system |
| 05/10/1994 | US5311080 Field programmable gate array with direct input/output connection |
| 05/10/1994 | US5311079 Low power, high performance PLA |
| 05/10/1994 | US5311078 Logic circuit and semiconductor device |
| 05/10/1994 | US5311077 Power supply, temperature, and load capacitance compensating, controlled slew rate output buffer |
| 05/10/1994 | US5311076 Tristate data output buffer having reduced switching noise and intermediate-level setting |
| 05/10/1994 | US5311075 Level shifting CMOS integrated circuits |
| 05/10/1994 | US5311074 Semiconductor integrated circuit device with crosstalk prevention |
| 05/10/1994 | US5311073 High voltage CMOS circuit with NAND configured logic gates and a reduced number of N-MOS transistors requiring drain extension |
| 05/05/1994 | DE4336907A1 Substrate potential generating circuit, e.g. for DRAM - has transmitter in charge pump circuit controlled to connect voltage applied to drain to substrate for predetermined time span |
| 05/05/1994 | DE4336887A1 Integrated semiconductor circuit e.g. DRAM chip - has distance between second output device - with drive rate adjusting element - and potential contact, greater than distance between first device and contact |
| 05/05/1994 | DE4336883A1 Integrated circuit output driver for suppressing noise generation, e.g. in DRAM - has current increase rate controller responding to voltage at predefined node in semiconductor substrate |
| 05/04/1994 | EP0595318A2 Buffer circuit for input signal having amplitude smaller than power voltage |
| 05/04/1994 | EP0595069A1 Current switching stage |
| 05/04/1994 | EP0594834A1 Intermediary circuit between a low voltage logic circuit and a high voltage output stage in standard cmos technology |
| 05/04/1994 | CN1086360A 输入缓冲器 Input Buffer |
| 05/03/1994 | US5309091 Testability architecture and techniques for programmable interconnect architecture |
| 05/03/1994 | US5309046 Apparatus and method for product term allocation in programmable logic |
| 05/03/1994 | US5309045 Configurable logic element with independently clocked outputs and node observation circuitry |
| 05/03/1994 | US5309043 Compound logic circuit having NAND and NOR gate outputs and two transistors connected within both gate circuits |
| 05/03/1994 | US5309042 Full swing BiCMOS amplifier |
| 05/03/1994 | US5309039 Power supply dependent input buffer |
| 05/03/1994 | CA2001332C Method for driving a pnpn semiconductor device |
| 05/03/1994 | CA1329239C Electronic arrays having thin film line drivers |
| 05/01/1994 | CA2108711A1 Electronic assemblies |
| 04/28/1994 | WO1994009566A1 Superconductor switching circuits |
| 04/28/1994 | WO1994009515A1 Electrical isolation in integrated circuits |
| 04/28/1994 | CA2124687A1 Electrical isolation in integrated circuits |
| 04/27/1994 | EP0594295A2 Drain power supplies |
| 04/27/1994 | EP0594294A2 Power supplies for flash EEPROM memory cells |
| 04/27/1994 | EP0594293A2 Negative power supplies for floating gate memories |
| 04/27/1994 | EP0594230A1 High efficiency n-channel charge pump |
| 04/27/1994 | EP0594222A2 Fuzzy inference engine |
| 04/27/1994 | EP0593628A1 Power mosfet driver with cross-conduction current reduction |
| 04/27/1994 | EP0593531A1 Active optical logic device incorporating a surface-emitting laser |
| 04/26/1994 | US5306966 High-speed and low-power consumption decoder unit implemented by emitter-coupled logic circuit |
| 04/26/1994 | US5306965 Process compensating variable impedence I/O driver with feedback |
| 04/26/1994 | US5306964 Reference generator circuit for BiCMOS ECL gate employing PMOS load devices |
| 04/26/1994 | US5306656 Method for reducing on resistance and improving current characteristics of a MOSFET |
| 04/20/1994 | EP0429486B1 In-chip intermediate driver for discrete wsi systems |
| 04/20/1994 | CN1085700A A control circuit system for control of parameters in logic circuits or similar |
| 04/19/1994 | US5305463 Null convention logic system |
| 04/19/1994 | US5305257 Semiconductor integrated circuit |
| 04/19/1994 | US5304872 TTL/CMOS input buffer operable with three volt and five volt power supplies |
| 04/19/1994 | US5304871 Programmable interconnect architecture employing leaky programmable elements |
| 04/19/1994 | US5304870 Source electrode-connected type buffer circuit having LDD structure and breakdown voltage protection |
| 04/19/1994 | US5304869 BiCMOS digital amplifier |
| 04/19/1994 | US5304868 Non-inverting buffer circuit device and semiconductor memory circuit device |
| 04/19/1994 | US5304867 CMOS input buffer with high speed and low power |
| 04/19/1994 | US5304858 Apparatus for maintaining a low power loss within an input stage for digital signals |
| 04/19/1994 | US5304856 Article comprising a balanced driver circuit with less power dissipation than conventional circuit |