Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
11/2006
11/21/2006US7138820 System monitor in a programmable logic device
11/21/2006US7138651 Logic apparatus and logic circuit
11/16/2006WO2006122271A2 Systems and methods for programming floating-gate transistors
11/16/2006WO2006120889A1 Transmitting apparatus
11/16/2006WO2006120247A1 Integrated driver circuit structure
11/16/2006US20060259892 R-cells containing CDM clamps
11/16/2006US20060259888 Method of tiling analog circuits that include resistors and capacitors
11/16/2006US20060259887 Integrated circuit design utilizing array of functionally interchangeable dynamic logic cells
11/16/2006US20060259834 Method and system for debug and test using replicated logic
11/16/2006US20060256534 Extended computing system
11/16/2006US20060255842 Semiconductor integrated circuit controlling output impedance and slew rate
11/16/2006US20060255836 Clock driver circuit and driving method therefor
11/16/2006US20060255835 Voltage level translator circuitry
11/16/2006US20060255834 Tri-state circuit using nanotube switching elements
11/16/2006US20060255833 FPGA device and method for rapid interconnect and logic testing of the same
11/16/2006US20060255832 Non-volatile memory architecture for programmable-logic-based system on a chip
11/16/2006US20060255831 Methods and apparatus for adaptively adjusting a data receiver
11/16/2006US20060255830 On-die termination apparatus
11/16/2006DE10244516B4 Integrierte Schaltung mit einer Eingangsschaltung An integrated circuit comprising an input circuit
11/16/2006CA2546369A1 Stabilization of state-holding circuits at high temperatures
11/15/2006CN1864332A Configurable logic circuit arrangement
11/15/2006CN1864331A Integrated circuit with electrostatic discharge protection
11/15/2006CN1864330A Transition detection at input of integrated circuit device
11/15/2006CN1862968A Integrated circuit design utilizing array of functionally interchangeable dynamic logic cells
11/15/2006CN1862967A Thin-oxide devices for high voltage i/o drivers
11/15/2006CN1862966A Logical switch device for low electromagnetic interference
11/15/2006CN1285173C LVDS driver for small supply voltages
11/15/2006CN1285170C Constant current CMOS output driver circuit with dual gate transistor devices
11/14/2006US7137095 Freeway routing system for a gate array
11/14/2006US7137090 Path slack phase adjustment
11/14/2006US7137028 Method and apparatus for improving reliability in microprocessors
11/14/2006US7136311 Level shifter, level shift circuit, electro-optical device, and electronic apparatus
11/14/2006US7135914 High voltage CMOS switch with reduced high voltage junction stresses
11/14/2006US7135908 Input stage resistant against high voltage swings
11/14/2006US7135896 Output buffer circuit and semiconductor integrated circuit
11/14/2006US7135890 SCL type FPGA with multi-threshold transistors and method for forming same
11/14/2006US7135889 Universal single-ended parallel bus
11/14/2006US7135888 Programmable routing structures providing shorter timing delays for input/output signals
11/14/2006US7135887 Programmable logic device multispeed I/O circuitry
11/14/2006US7135886 Field programmable gate arrays using both volatile and nonvolatile memory cell properties and their control
11/14/2006US7135885 Dynamically adjustable signal detector
11/14/2006US7135701 Adiabatic quantum computation with superconducting qubits
11/09/2006WO2006119276A2 Voltage-level shifter
11/09/2006WO2006117860A1 Differential driving circuit and electronic device incorporating the same
11/09/2006WO2006117391A1 Device forming a logic gate for minimizing the differences in electrical or electromagnetic behavior in an integrated circuit manipulating a secret
11/09/2006WO2006117236A2 Apparatus and method for reducing power comsumption within an oscillator
11/09/2006US20060253825 Relocatable mixed-signal functions
11/09/2006US20060250168 Highly configurable PLL architecture for programmable logic
11/09/2006US20060250160 Fault-tolerant clock generator
11/09/2006US20060250159 Temperature compensated refresh clock circuit for memory circuits
11/09/2006US20060250158 Device and method for matching output impedance in signal transmission system
11/09/2006US20060250157 Impedance controllable output drive circuit in semiconductor device and impedance control method therefor
11/09/2006US20060250156 Output impedance circuit and output buffer circuit including the same
11/09/2006US20060250155 Signal isolators using micro-transformers
11/09/2006CA2607553A1 Device forming a logic gate for minimizing the differences in electrical or electromagnetic behavior in an integrated circuit manipulating a secret
11/08/2006EP1720257A1 Soi structure single event tolerance inverter, nand element, nor element, semiconductor memory element, and data latch circuit
11/08/2006EP1720256A2 Line receiver circuit
11/08/2006EP1417760A4 Circuit for improving noise immunity by dv/dt boosting
11/08/2006CN1860684A 电路系统 Circuit Systems
11/08/2006CN1860448A Processor and integrated circuit comprising reconfigurable circuit, and processing method utilizing it
11/08/2006CN1860441A Efficient high performance data operation element for use in a reconfigurable logic environment
11/08/2006CN1284300C Probabilistic calculation element, drive method thereof, and recognition device using the same
11/08/2006CN1284245C CMOS transistor inverter with multiple grid transistor
11/07/2006US7134033 Clock synchronization apparatus and method of devices with different clocks
11/07/2006US7133819 Method for adaptive critical path delay estimation during timing-driven placement for hierarchical programmable logic devices
11/07/2006US7133487 Level shifter
11/07/2006US7133318 Output driver capable of controlling slew rate of output signal according to operating frequency information or CAS latency information
11/07/2006US7133269 Overvoltage protection apparatus
11/07/2006US7132875 Voltage switching circuit
11/07/2006US7132871 Data retaining circuit
11/07/2006US7132858 Logic circuit
11/07/2006US7132857 High speed receiver with wide input voltage range
11/07/2006US7132856 Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors
11/07/2006US7132855 Level shift circuit for use in semiconductor device
11/07/2006US7132854 Data path configurable for multiple clocking arrangements
11/07/2006US7132853 Inter-tile buffer system for a field programmable gate array
11/07/2006US7132852 Routing architecture with high speed I/O bypass path
11/07/2006US7132851 Columnar floorplan
11/07/2006US7132850 Semiconductor integrated circuit and circuit design apparatus
11/07/2006US7132849 Method and apparatus for configuring the operation of an integrated circuit
11/07/2006US7132848 Power management circuit
11/07/2006US7132847 Programmable slew rate control for differential output
11/07/2006US7132727 Layout technique for C3MOS inductive broadbanding
11/02/2006WO2006115812A2 Method and system for debugging using replicated logic and trigger logic
11/02/2006WO2006115213A1 Circuit updating system
11/02/2006WO2006115212A1 Algorithm update system
11/02/2006WO2006115075A1 Semiconductor integrated circuit
11/02/2006WO2006115062A1 General-purpose logic module and circuit having the same
11/02/2006WO2006114875A1 Semiconductor integrated circuit
11/02/2006WO2006087698A3 Logic circuit and method of logic circuit design
11/02/2006US20060248493 FPGA with hybrid interconnect
11/02/2006US20060248354 Monitoring and controlling power consumption
11/02/2006US20060248260 Circuit system
11/02/2006US20060244493 Ultra-drowsy circuit
11/02/2006US20060244491 Method and unit for buffer control
11/02/2006US20060244490 Method and circuit for controlling a refresh of a semiconductor memory device
11/02/2006US20060244489 Buffer circuit
11/02/2006US20060244488 Current mode signaling in electronic data processing circuit
11/02/2006US20060244487 Signal output circuit
11/02/2006US20060244486 Anticipatory programmable interface pre-driver