| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 07/25/2006 | US7081774 Circuit having source follower and semiconductor device having the circuit |
| 07/25/2006 | US7081773 Updating configuration for programmable logic device |
| 07/25/2006 | US7081772 Optimizing logic in non-reprogrammable logic devices |
| 07/25/2006 | US7081771 Upgradeable and reconfigurable programmable logic device |
| 07/20/2006 | WO2006076276A2 Configurable dedicated logic cells in programmable logic and routing blocks with dedicated lines and local connections |
| 07/20/2006 | WO2006074859A1 Non-volatile reconfigurable digital logic unit |
| 07/20/2006 | US20060158927 Spin based electronic device |
| 07/20/2006 | US20060158921 Semiconductor integrated circuit device |
| 07/20/2006 | US20060158241 CMOS-based receiver for communications applications |
| 07/20/2006 | US20060158233 Programmable phase-locked loop circuitry for programmable logic device |
| 07/20/2006 | US20060158227 Complimentary metal oxide silicon low voltage positive emitter coupled logic buffer |
| 07/20/2006 | US20060158226 Inverting dynamic register with data-dependent hold time reduction mechanism |
| 07/20/2006 | US20060158225 High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation |
| 07/20/2006 | US20060158224 Output driver with feedback slew rate control |
| 07/20/2006 | US20060158223 Method and apparatus for multi-mode driver |
| 07/20/2006 | US20060158222 Testing using independently controllable voltage islands |
| 07/20/2006 | US20060158221 Logic circuit combining exclusive OR gate and exclusive NOR gate |
| 07/20/2006 | US20060158220 Methods of reducing power in programmable logic devices using low voltage swing for routing signals |
| 07/20/2006 | US20060158219 Programmable logic and routing blocks with dedicated lines |
| 07/20/2006 | US20060158218 Electronic circuit with array of programmable logic cells |
| 07/20/2006 | US20060158217 Timing exact design conversions from FPGA to ASIC |
| 07/20/2006 | US20060158216 Semiconductor integrated circuit device |
| 07/20/2006 | US20060158215 Technology for supressing noise of data bus circuit |
| 07/20/2006 | US20060158214 Apparatus and method for independent control of on-die termination for ouput buffers of a memory device |
| 07/20/2006 | US20060158213 Apparatus and method of tuning a digitally controlled input/output driver |
| 07/20/2006 | US20060157688 Methods of forming semiconductor constructions and integrated circuits |
| 07/20/2006 | DE20221609U1 Integrated circuit has high speed output buffers and low speed output buffers connected to pad such that they are selectively activated |
| 07/20/2006 | DE102005059489A1 Schaltung und Verfahren zur Eingabesignalbestimmung Circuit and method for input signal determination |
| 07/20/2006 | DE102004059467A1 Gatter aus organischen Feldeffekttransistoren Gate organic field effect transistors |
| 07/20/2006 | DE10007607B4 Ausfallsichere Überspannungsschutzschaltung Failsafe overvoltage protection circuit |
| 07/19/2006 | CN1806388A Method of reducing the propagation delay and process and temperature effects on a buffer |
| 07/19/2006 | CN1805286A Semiconductor device, display device and electronic apparatus |
| 07/19/2006 | CN1805285A Low voltage differential amplitude driver with high power supply noise suppression ratio |
| 07/19/2006 | CN1805282A Output driver with feedback slew rate control |
| 07/19/2006 | CN1265459C Low consumption power metal-insulator-semiconductor semiconductor device |
| 07/19/2006 | CN1265456C Electronic devices |
| 07/18/2006 | US7080347 Method, system and program product for specifying a configuration of a digital system described by a hardware description language (HDL) model |
| 07/18/2006 | US7080345 Methods and apparatus for design entry and synthesis of digital circuits |
| 07/18/2006 | US7080270 Multi-threshold-voltage integrated circuit having a non-volatile data storage circuit |
| 07/18/2006 | US7080185 Bus control device altering drive capability according to condition |
| 07/18/2006 | US7079395 Extended computing system |
| 07/18/2006 | US7078961 Device and method for calibrating R/C filter circuits |
| 07/18/2006 | US7078959 Multiple circuit blocks with interblock control and power conservation |
| 07/18/2006 | US7078953 Level down converter |
| 07/18/2006 | US7078943 Series terminated CMOS output driver with impedance calibration |
| 07/18/2006 | US7078937 Logic circuitry powered by partially rectified ac waveform |
| 07/18/2006 | US7078936 Coupling of signals between adjacent functional blocks in an integrated circuit chip |
| 07/18/2006 | US7078935 Simultaneous bi-directional transceiver |
| 07/18/2006 | US7078934 Level conversion circuit |
| 07/18/2006 | US7078933 Architecture and interconnect scheme for programmable logic circuits |
| 07/18/2006 | US7078932 Programmable logic device with reduced power consumption |
| 07/18/2006 | US7078931 GTL output structure having a slew rate control restore circuit |
| 07/18/2006 | US7078930 Integrated circuit chip with high area utilization rate |
| 07/18/2006 | US7078929 Interface controller using JTAG scan chain |
| 07/18/2006 | US7078928 Semiconductor integrated circuit device |
| 07/18/2006 | CA2313462C Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem |
| 07/13/2006 | WO2006073176A1 Semiconductor integrated circuit device |
| 07/13/2006 | WO2006072142A1 A reprogrammable integrated circuit |
| 07/13/2006 | US20060156039 Power supply for an asynchronous data treatment circuit |
| 07/13/2006 | US20060152968 Spin based device with low transmission barrier |
| 07/13/2006 | US20060152395 Integrated circuit with embedded identification code |
| 07/13/2006 | US20060152274 Voltage generating/transferring circuit |
| 07/13/2006 | US20060152271 Interface system between controller IC and driver IC, and IC suitable for such interface system |
| 07/13/2006 | US20060152254 Reduced current input buffer circuit |
| 07/13/2006 | US20060152249 Configuration circuit for programmable logic devices |
| 07/13/2006 | US20060152248 Configuration circuits for programmable logic devices |
| 07/13/2006 | US20060152247 System and method for reducing power consumption associated with the capacitance of inactive portions of a multiplexer |
| 07/13/2006 | US20060152246 Method and apparatus for configuring the operation of an integrated circuit |
| 07/13/2006 | DE10255642B4 Verfahren und Vorrichtung zum Ausgeben eines Digitalsignals Method and apparatus for outputting a digital signal |
| 07/13/2006 | DE102005038001A1 Voltage level shift circuit for use in e.g. memory device, has one stage outputting complementary intermediate signals, and another stage receiving intermediate signals and outputting complementary output signals |
| 07/13/2006 | DE102005005090B3 Method for switching between parallel-circuited electronic modules, requires storage of configuration value in first programmable register |
| 07/12/2006 | EP1679797A1 A low noise output buffer capable of operating at high speeds |
| 07/12/2006 | EP1678651A2 Method and apparatus for a chaotic computing module |
| 07/12/2006 | CN1802792A Digital differential amplification control device |
| 07/12/2006 | CN1801621A Output reporting techniques for hard intellectual property blocks |
| 07/12/2006 | CN1801605A Comparator using differential amplifier with reduced current consumption |
| 07/12/2006 | CN1801299A 缓冲器电路和有机发光显示器 A buffer circuit and an organic light emitting display |
| 07/12/2006 | CN1801021A Electric device centralized control system with data bus for engineering machinery |
| 07/11/2006 | US7076757 Semiconductor integrated device and apparatus for designing the same |
| 07/11/2006 | US7076595 Programmable logic device including programmable interface core and central processing unit |
| 07/11/2006 | US7076582 Bus precharge during a phase of a clock signal to eliminate idle clock cycle |
| 07/11/2006 | US7076537 Designing interconnect fabrics |
| 07/11/2006 | US7076229 Circuits with improved power supply rejection |
| 07/11/2006 | US7075977 Circuit for a transceiver output port of a local area networking device |
| 07/11/2006 | US7075354 Dynamic multi-input priority multiplexer |
| 07/11/2006 | US7075342 Driver circuit |
| 07/11/2006 | US7075339 Semiconductor output circuit device |
| 07/11/2006 | US7075337 Single event upset immune keeper circuit and method for dual redundant dynamic logic |
| 07/11/2006 | US7075336 Method for distributing clock signals to flip-flop circuits |
| 07/11/2006 | US7075335 Level shifter |
| 07/11/2006 | US7075334 Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks |
| 07/11/2006 | US7075333 Programmable circuit optionally configurable as a lookup table or a wide multiplexer |
| 07/11/2006 | US7075332 Six-input look-up table and associated memory control circuitry for use in a field programmable gate array |
| 07/11/2006 | US7075331 Methods and systems for providing hardware assisted programming of a programmable logic device in an embedded system |
| 07/11/2006 | US7075330 System and method for balancing capacitively coupled signal lines |
| 07/11/2006 | US7075328 Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array |
| 07/11/2006 | US7074673 Service programmable logic arrays with low tunnel barrier interpoly insulators |
| 07/06/2006 | WO2006071570A2 Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an fpga |
| 07/06/2006 | WO2006070811A1 Semiconductor device and level shifting circuit |
| 07/06/2006 | WO2006070683A1 Switching element, production mehod for switching element, rewritable logical integrated circuit, and memory element |