| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 08/23/2006 | EP1693964A1 P-Domino output latch |
| 08/23/2006 | EP1693963A2 Interface circuit |
| 08/23/2006 | EP1693961A1 Programmable logic device including multipliers and configurations thereof to reduce resource utilization |
| 08/23/2006 | EP1692831A1 Power savings in serial link transmitters |
| 08/23/2006 | EP1547248A4 High speed zero dc power programmable logic device (pld) architecture |
| 08/23/2006 | EP1451932B1 Output driver comprising an improved control circuit |
| 08/23/2006 | CN1822504A Complementary cross coupling energy restoring circuit structure |
| 08/23/2006 | CN1822503A Multi-threshold cmos system and methods for controlling respective blocks |
| 08/23/2006 | CN1822502A Receiver circuit |
| 08/23/2006 | CN1822501A Static discharge voltage-free high input voltage endurable input/output circuit |
| 08/23/2006 | CN1822500A Analog buffers and related signal driving circuit,electronic device |
| 08/23/2006 | CN1271787C 可编程逻辑单元结构 Programmable logic unit structure |
| 08/23/2006 | CN1271786C Programmable logic device structure modeling method |
| 08/23/2006 | CN1271785C Level shift circuit and semiconductor integrated circuits |
| 08/23/2006 | CN1271531C Electronic circuit |
| 08/22/2006 | US7096444 Representing device layout using tree structure |
| 08/22/2006 | US7096437 Method and apparatus for a chaotic computing module using threshold reference signal implementation |
| 08/22/2006 | US7096374 Method and apparatus for defining an input state vector that achieves low power consumption in digital circuit in an idle state |
| 08/22/2006 | US7095788 Circuit for facilitating simultaneous multi-directional transmission of multiple signals between multiple circuits using a single transmission line |
| 08/22/2006 | US7095288 Logic system with adaptive supply voltage control |
| 08/22/2006 | US7095269 Voltage generator |
| 08/22/2006 | US7095255 Ultra-drowsy circuit |
| 08/22/2006 | US7095253 Programmable multi-chip module |
| 08/22/2006 | US7095252 Charge sharing reduction by applying intrinsic parallelism in complex dynamic domino type CMOS gates |
| 08/22/2006 | US7095251 Clock gating for synchronous circuits |
| 08/22/2006 | US7095250 Single wire bus communication system with method for handling simultaneous responses from multiple clients |
| 08/22/2006 | US7095249 Semiconductor integrated circuit |
| 08/22/2006 | US7095248 Hardware and software programmable fuses for memory repair |
| 08/22/2006 | US7095246 Variable impedance output buffer |
| 08/22/2006 | US7095245 Internal voltage reference for memory interface |
| 08/22/2006 | US7095227 Superconducting driver circuit |
| 08/22/2006 | US7093975 Semiconductor integrated circuit with simply configured temperature detection circuit |
| 08/21/2006 | CA2532857A1 Automated switch scanning matrix for obtaining user input |
| 08/17/2006 | US20060184912 Automatic design apparatus for semiconductor integrated circuits, method for automatically designing semiconductor integrated circuits, and computer program product for executing an application for an automatic design apparatus for semiconductor integrated circuits |
| 08/17/2006 | US20060184910 Reconfigurable interconnect for use in software-defined radio systems |
| 08/17/2006 | US20060181339 Semiconductor device with resistor element |
| 08/17/2006 | US20060181326 System and method for local generation of a ratio clock |
| 08/17/2006 | US20060181313 Transistor logic circuit |
| 08/17/2006 | US20060181312 Semiconductor device with adjustable signal drive power |
| 08/17/2006 | US20060181311 Circuit for generating an internal enabling signal for an output buffer of a memory |
| 08/17/2006 | US20060181310 Exclusive-or and/or exclusive-nor circuits including output switches and related methods |
| 08/17/2006 | US20060181309 Semiconductor device and layout design method for the same |
| 08/17/2006 | US20060181308 Programmable structured arrays |
| 08/17/2006 | US20060181307 Semiconductor integrated circuit and method for laying-out and wiring the semiconductor integrated circuit |
| 08/17/2006 | US20060181306 Multi-threshold CMOS system and methods for controlling respective blocks |
| 08/17/2006 | US20060181305 Integrated circuit including programmable logic and external-device chip-enable override control |
| 08/17/2006 | US20060181304 Logic line driver system for providing an optimal driver characteristic |
| 08/17/2006 | US20060181303 Data receiver with a programmable reference voltage to optimize timing jitter |
| 08/16/2006 | EP1691483A2 Interface circuit, power conversion device, and vehicle-mounted electric machinery system |
| 08/16/2006 | CN1820453A Method and apparatus for providing security for debug circuitry |
| 08/16/2006 | CN1819461A Dead zone protecting circuit of electronic prospecting signal transmitter |
| 08/16/2006 | CN1270441C Semiconductor device suitable for cut-off and turn-on of power supply |
| 08/16/2006 | CN1270440C Bus buffer circuit containing logic circuit |
| 08/15/2006 | US7093144 Signal transfer across a voltage domain boundary |
| 08/15/2006 | US7093054 Method of transferring signals between a TTL microcontroller and a RS232 device |
| 08/15/2006 | US7093023 Methods, systems, and devices using reprogrammable hardware for high-speed processing of streaming data to find a redefinable pattern and respond thereto |
| 08/15/2006 | US7091768 Circuit for controlling internal supply voltage driver |
| 08/15/2006 | US7091767 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit |
| 08/15/2006 | US7091761 Impedance controlled output driver |
| 08/15/2006 | US7091754 CMOS LvPECL driver with output level control |
| 08/15/2006 | US7091749 Semiconductor device |
| 08/15/2006 | US7091748 Semiconductor integrated circuit |
| 08/15/2006 | US7091747 Circuit for translating voltage signal levels |
| 08/15/2006 | US7091746 Reduced device count level shifter with power savings |
| 08/15/2006 | US7091745 Indicating completion of configuration for programmable devices |
| 08/15/2006 | US7091744 Input termination circuits and methods for terminating inputs |
| 08/15/2006 | US7091741 Input buffer capable of reducing input capacitance seen by input signal |
| 08/15/2006 | US7091740 Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory |
| 08/15/2006 | US7091736 Method and apparatus for selecting multiple settings for an integrated circuit function |
| 08/15/2006 | US7091630 Device and method for inhibiting power fluctuation |
| 08/10/2006 | WO2006083700A2 Asics having programmable bypass of design faults |
| 08/10/2006 | WO2006082458A1 Bus arbitration controller with reduced energy consumption |
| 08/10/2006 | WO2006082156A1 Line driver with selectable power consumption |
| 08/10/2006 | WO2006059269A3 Electronic device having logic circuitry and method for designing logic circuitry |
| 08/10/2006 | US20060179417 Alterable application specific integrated circuit (ASIC) |
| 08/10/2006 | US20060176094 Current-controlled CMOS logic family |
| 08/10/2006 | US20060176081 Fast pulse powered NOR decode apparatus for semiconductor devices |
| 08/10/2006 | US20060176080 Power supply noise insensitive multiplexer |
| 08/10/2006 | US20060176079 Input/output circuit of semiconductor memory device and input/output method thereof |
| 08/10/2006 | US20060176078 Voltage level shifting circuit and method |
| 08/10/2006 | US20060176077 Programmable application specific integrated circuit for communication and other applications |
| 08/10/2006 | US20060176076 Communication device for a logic circuit |
| 08/10/2006 | US20060176075 Customizable and Programmable Cell Array |
| 08/10/2006 | US20060176073 Clocked preconditioning of intermediate nodes |
| 08/10/2006 | DE19900337B4 Differenzsignalübertragungsschaltung Differential signal transmission circuit |
| 08/10/2006 | DE19824796B4 Verfahren und Vorrichtung zur Leistungsoptimierung der Registerübertragungsebene, insbesondere mit einer Störimpuls-Analyse und -Reduktion Method and apparatus for optimizing the performance of register transfer level, particularly with a glitch analysis and reduction |
| 08/09/2006 | EP1687726A1 Method and apparatus for receiver detection on a pci-express bus |
| 08/09/2006 | EP1471643B1 Logical operation circuit and logical operation method |
| 08/09/2006 | CN1816968A Nonvolatile flip-flop circuit, and method for driving the same |
| 08/09/2006 | CN1816965A Large gain-bandwidth amplifier, method, and system |
| 08/09/2006 | CN1815890A Level translator circuit and display element drive circuit using same |
| 08/09/2006 | CN1815889A Level shift circuit, electro-optical device using the same, and electronic apparatus |
| 08/09/2006 | CN1815628A Techniques for combining volatile and non-volatile programmable logic circuits on an integrated circuit |
| 08/08/2006 | US7089527 Structures and methods for selectively applying a well bias to portions of a programmable device |
| 08/08/2006 | US7088167 Level conversion for use in semiconductor device |
| 08/08/2006 | US7088165 Voltage level shifter and sequential pulse generator |
| 08/08/2006 | US7088161 Semiconductor integrated circuit with reduced leakage current |
| 08/08/2006 | US7088152 Data driving circuit and semiconductor memory device having the same |
| 08/08/2006 | US7088150 Driver-side current clamping with non-persistent charge boost |
| 08/08/2006 | US7088145 AC powered logic circuitry |