Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
07/2006
07/06/2006WO2006044175A3 Logic circuitry
07/06/2006US20060150138 Method of creating optimized tile-switch mapping architecture in on-chip bus and computer-readable medium for recording the same
07/06/2006US20060150137 Three dimensional integrated circuits
07/06/2006US20060146958 High-speed input signal receiver circuit
07/06/2006US20060145735 Output buffer circuit eliminating high voltage insulated transistor and level shift circuit, and an interface circuit using the output buffer circuit
07/06/2006US20060145726 Low power consumption MIS semiconductor device
07/06/2006US20060145725 Relatively low standby power
07/06/2006US20060145724 Relatively low standby power
07/06/2006US20060145723 Voltage level conversion circuit
07/06/2006US20060145722 Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array
07/06/2006DE19959402B4 Treiberschaltung Driver circuit
07/05/2006EP1677420A2 Magnetic logic device and methods of manufacturing and operating the same
07/05/2006EP1649599A4 High side power switch with charge pump and bootstrap capacitor
07/05/2006CN1797951A Apparatus and method for adjusting performance characteristics of programmable logic devices
07/05/2006CN1797950A Signal generation circuit
07/05/2006CN1263222C Circuit configuration for supplying power to integrated circuit via pad
07/05/2006CN1263129C Electric level transfer circuit
07/04/2006US7073156 Gate estimation process and method
07/04/2006US7073147 Method of manufacturing a semiconductor device
07/04/2006US7073087 Transition signal control unit and DMA controller and transition signal control processor using transition signal control unit
07/04/2006US7072211 Systems and methods for write protection of non-volatile memory devices
07/04/2006US7071765 Boost clock generation circuit and semiconductor device
07/04/2006US7071758 Voltage level shifter
07/04/2006US7071743 Programmable phase-locked loop circuitry for programmable logic device
07/04/2006US7071736 Half-swing line precharge method and apparatus
07/04/2006US7071735 Level shifter and panel display using the same
07/04/2006US7071734 Programmable logic devices with silicon-germanium circuitry and associated methods
07/04/2006US7071733 Cross-bar matrix for connecting digital resources to I/O pins of an integrated circuit
07/04/2006US7071732 Scalable complex programmable logic device with segmented interconnect resources
07/04/2006US7071730 Voltage level translator circuitry
07/04/2006US7071729 Dual-purpose shift register
07/04/2006US7071728 Hybrid compensated buffer design
07/04/2006US7071727 Method and apparatus for mitigating radio frequency radiation from a microprocessor bus
07/04/2006US7071726 Selectable dynamic reconfiguration of programmable embedded IP
07/04/2006US7071725 Data processing apparatus and logical operation apparatus
07/04/2006US7071518 Schottky device
06/2006
06/29/2006WO2006068109A1 Programmable logic circuit
06/29/2006WO2006067859A1 Interface circuit
06/29/2006US20060143035 Semiconductor-integrated device, electronics device using the same, and accounting method concerning the use thereof
06/29/2006US20060139101 Step-down circuit with stabilized voltage
06/29/2006US20060139086 Circuit arrangement for bridging high voltages using a switching signal
06/29/2006US20060139085 Differential circuit and receiver with same
06/29/2006US20060139061 Protected set dominant latch
06/29/2006US20060139060 Semiconductor memory device
06/29/2006US20060139059 Level shift circuit and method
06/29/2006US20060139058 Supply enabled optimization output buffer
06/29/2006US20060139057 Structured integrated circuit device
06/29/2006US20060139056 Field programmable structured arrays
06/29/2006US20060139055 Interconnect structure enabling indirect routing in programmable logic
06/29/2006US20060139054 Look-up table structure with embedded carry logic
06/29/2006US20060139053 Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA
06/29/2006US20060139052 Semiconductor integrated circuits with power reduction mechanism
06/29/2006US20060139051 Variable impedence output buffer
06/29/2006DE19738726B4 Datenausgabe-bezogener Schaltkreis für Halbleiterspeichervorrichtung mit Eignung für Hochgeschwindigkeitsbetrieb Data-related circuit for semiconductor memory device with suitability for high-speed operation
06/29/2006DE102005059806A1 Verfahren zum Verbessern eines Strom- und Anstiegsraten-Verhältnisses von chipexternen Treibern A method for improving a current rise-rate and the ratio of off chip drivers
06/29/2006DE102005053258A1 Application-specific integrated circuit`s power managing method for e.g. steering sensor, involves disconnecting power supplied to circuit after power supplied to circuit during ON time, and data from circuit is stored in latches
06/29/2006DE102005052750A1 Verfahren und Systeme zum Schalten zwischen mehreren Zuständen unter Verwendung zumindest einer ternären Eingabe und zumindest einer diskreten Eingabe Methods and systems for switching between multiple states using at least a ternary input and at least one discrete input
06/28/2006EP1673867A2 System and method for dynamically executing a function in a programmable logic array
06/28/2006CN1795428A 监测和控制功耗 Monitoring and control of power
06/28/2006CN1794586A Negative voltage effective transmission circuit of standard logic process
06/28/2006CN1794585A Mos type semiconductor integrated circuit device
06/28/2006CN1262070C Magnetic hysteresis circuit device having input signal level adjustment
06/28/2006CN1262069C Semiconductor integrated circuit having leakage current cut-off circuit
06/28/2006CN1262068C Over-voltage protector circuit with output buffer
06/28/2006CN1262008C AND gate logic device with mono-wall carbon nano tube structure and mfg. method
06/27/2006US7069485 Reading data from a memory with a memory access controller
06/27/2006US7069419 Field programmable gate array and microcontroller system-on-a-chip
06/27/2006US7068727 Halting data strobes on a source synchronous link and utilization of same to debug data capture problems
06/27/2006US7068548 Semiconductor integrated circuit with noise reduction circuit
06/27/2006US7068535 Magnetic spin based memory with semiconductor selector
06/27/2006US7068083 Synchronous output buffer, synchronous memory device and method of testing access time
06/27/2006US7068078 Data output driver
06/27/2006US7068077 LVDS output driver having low supply voltage capability
06/27/2006US7068076 Semiconductor device and display device
06/27/2006US7068075 Multi-level voltage output control circuit and logic gate therefor
06/27/2006US7068074 Voltage level translator circuit
06/27/2006US7068073 Circuit for switching one or more HVD transceivers
06/27/2006US7068072 Integrated circuit with interface tile for coupling to a stacked-die second integrated circuit
06/27/2006US7068071 Integrated circuit with overclocked dedicated logic circuitry
06/27/2006US7068070 Customizable and programmable cell array
06/27/2006US7068069 Control circuit and reconfigurable logic block
06/27/2006US7068068 Re-configurable mixed-mode integrated circuit architecture
06/27/2006US7068067 Semiconductor circuit device having active and standby states
06/27/2006US7068066 System for transmission line termination by signal cancellation
06/27/2006US7068064 Memory module with dynamic termination using bus switches timed by memory clock and chip select
06/27/2006US7068063 Output buffer circuit
06/27/2006US7067888 Semiconductor device and a method of manufacturing the same
06/22/2006WO2006064822A1 Semiconductor device and electronic appliance using the same
06/22/2006US20060136858 Utilizing fuses to store control parameters for external system components
06/22/2006US20060132228 Multiple circuit blocks with interblock control and power conservation
06/22/2006US20060132214 Level shifter
06/22/2006US20060132188 Unfooted domino logic circuit and method
06/22/2006US20060132187 Body biasing for dynamic circuit
06/22/2006US20060132186 Dynamic phase assignment optimization using skewed static buffers in place of dynamic buffers
06/22/2006US20060132185 Clock gating circuit
06/22/2006US20060132184 Systems and methods for reducing timing variations by adjusting buffer drivability
06/22/2006US20060132183 Semiconductor device
06/22/2006US20060132182 Driver circuit, shift register, and liquid crystal driver circuit
06/22/2006US20060132181 Multipath input buffer circuits
06/22/2006US20060132180 Current driver, data driver, and display device