Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
09/2006
09/06/2006CN1829091A Output driver in semiconductor device
09/06/2006CN1829090A Data input buffer for use in a semiconductor device
09/06/2006CN1829089A High-voltage level conversion circuit
09/06/2006CN1829080A Cross-talk reduction circuit and method therefor
09/06/2006CN1828901A Semiconductor lsi circuit and a method for fabricating the semiconductor lsi circuit
09/06/2006CN1828558A Encrypt device and method for static RAM programmable gate array chip
09/06/2006CN1274085C Integrated Circuit device and its designing method
09/06/2006CN1274084C Charge pump circuit
09/06/2006CN1274021C Semiconductor integrated circuit equipment and method for detecting delay error in the same equipment
09/05/2006US7103866 Method for designing semiconductor circuit device, utilizing boundary cells between first and second circuits driven by different power supply systems
09/05/2006US7103864 Semiconductor device, and design method, inspection method, and design program therefor
09/05/2006US7103861 Test structure for automatic dynamic negative-bias temperature instability testing
09/05/2006US7103429 Universal computer architecture
09/05/2006US7102942 Encoding circuit for semiconductor device and redundancy control circuit using the same
09/05/2006US7102598 Predrive circuit, drive circuit and display device
09/05/2006US7102545 Simultaneous bidirectional input/output circuit
09/05/2006US7102391 Clock-generator architecture for a programmable-logic-based system on a chip
09/05/2006US7102390 Method and apparatus for signal reception using ground termination and/or non-ground termination
09/05/2006US7102389 Voltage translator with data buffer
09/05/2006US7102388 Interface device and information processing system
09/05/2006US7102387 Periodic computation structure based on 1-input lookup tables
09/05/2006US7102386 Reconfigurable electronic device having interconnected data storage devices
09/05/2006US7102385 Dedicated input/output first in/first out module for a field programmable gate array
09/05/2006US7102384 Non-volatile memory architecture for programmable-logic-based system on a chip
09/05/2006US7102383 Method for programming/parallel programming of onboard flash memory by multiple access bus
09/05/2006US7102382 Digital electronic circuit with low power consumption
09/05/2006US7102381 Adaptive termination for optimum signal detection
09/05/2006US7102254 Integrated circuit and battery powered electronic device
08/2006
08/31/2006WO2006090651A1 Semiconductor integrated circuit, semiconductor integrated circuit control method, and signal transmission circuit
08/31/2006WO2006033583A3 Quadrature divide-by-three frequency divider and low voltage muller c element
08/31/2006US20060195811 System and method for reducing design cycle time for designing input/output cells
08/31/2006US20060193181 SRAM bus architecture and interconnect to an FPGA
08/31/2006US20060192600 Synchronous output buffer, synchronous memory device and method of testing access time
08/31/2006US20060192591 Logic circuits utilizing gated diode sensing
08/31/2006US20060192590 Differential switching circuit and digital-to-analog converter
08/31/2006US20060192589 Inverter apparatus with improved gate drive for power MOSFET
08/31/2006US20060192588 Differential output circuit and semiconductor device having the same
08/31/2006US20060192587 Self-bypassing voltage level translator circuit
08/31/2006US20060192586 Reconfigurable sequencer structure
08/31/2006DE19983293B4 Eine Belastungsnachführungs-Schaltungskonfiguration A circuit configuration Belastungsnachführungs
08/30/2006EP1696568A1 Multi-bit digital input using a single pin
08/30/2006EP1696567A1 Level shift circuit, actuator apparatus using the same, and optical switch system
08/30/2006EP1696566A2 Ultra-low power limiter
08/30/2006CN1826731A Method and apparatus for encoding of low voltage swing signals
08/30/2006CN1826691A Multi-power source voltage semiconductor device
08/30/2006CN1825767A Dual-voltage three-state buffer circuit
08/30/2006CN1825766A Self-bypassing voltage level translator circuit
08/30/2006CN1825765A Tie-high and tie-low circuit, system and interrelated semiconductor set
08/30/2006CN1272851C Integrated complementary metal oxide semiconductor circuit
08/30/2006CN1272847C Clock signal transmission circuit
08/30/2006CN1272763C Display device
08/29/2006US7099982 Multi-port communications integrated circuit
08/29/2006US7099817 Stalling CPU pipeline to prevent corruption in trace while maintaining coherency with asynchronous events
08/29/2006US7099167 Step-down circuit, power supply circuit, and semiconductor integrated circuit
08/29/2006US7098833 Tri-value decoder circuit and method
08/29/2006US7098735 Reference buffer with dynamic current control
08/29/2006US7098707 Highly configurable PLL architecture for programmable logic
08/29/2006US7098704 Semiconductor integrated circuit device
08/29/2006US7098701 Receiving apparatus and transmission apparatus utilizing the same
08/29/2006US7098700 Low power output driver
08/29/2006US7098699 Buffer circuit device supplying a common mode voltage applicable to a next-stage circuit receiving output signals of the buffer circuit device
08/29/2006US7098697 Low voltage high-speed differential logic devices and method of use thereof
08/29/2006US7098696 Logic circuit and semiconductor integrated circuit
08/29/2006US7098695 Dynamic-to-static logic converter
08/29/2006US7098694 Overvoltage tolerant input buffer
08/29/2006US7098693 Bi-directional voltage translator
08/29/2006US7098692 Switchable power domains for 1.2v and 3.3v pad voltages
08/29/2006US7098691 Structured integrated circuit device
08/29/2006US7098690 Programmable I/O element circuit for high speed logic devices
08/29/2006US7098689 Disabling unused/inactive resources in programmable logic devices for static power reduction
08/29/2006US7098688 Regionally time multiplexed emulation system
08/29/2006US7098687 Flexible routing resources in a programmable logic device
08/29/2006US7098686 System generated electromagnetic pulse guard
08/29/2006US7098685 Scalable serializer-deserializer architecture and programmable interface
08/29/2006US7098684 High speed switch
08/29/2006US7098494 Re-configurable logic elements using heat assisted magnetic tunneling elements
08/24/2006WO2006087845A1 Level shift circuit and semiconductor integrated circuit having the same
08/24/2006WO2006040706A3 Low voltage, high-speed output-stage for laser or modulator driving
08/24/2006US20060190907 Methods and apparatus for implementing parameterizable processors and peripherals
08/24/2006US20060190903 ASICs having programmable bypass of design faults
08/24/2006US20060190860 Method and system for debugging using replicated logic and trigger logic
08/24/2006US20060189082 Standby current reduction over a process window with a trimmable well bias
08/24/2006US20060187704 Spin based sensor device
08/24/2006US20060187166 Semiconductor Device and Display Device
08/24/2006US20060186934 Driver circuit
08/24/2006US20060186925 Tie-high and tie-low circuit
08/24/2006US20060186924 Voltage-level converter
08/24/2006US20060186923 Interface circuit
08/24/2006US20060186922 Translator circuit and method therefor
08/24/2006US20060186921 Dual-voltage three-state buffer circuit with simplified tri-state level shifter
08/24/2006US20060186920 Inter-tile buffer system for a field programmable gate array
08/24/2006US20060186919 Dedicated logic cells employing configurable logic and dedicated logic functions
08/24/2006US20060186918 Dedicated logic cells employing sequential logic and control logic functions
08/24/2006US20060186917 I/O circuitry shared between processor and programmable logic portions of an integrated circuit
08/24/2006US20060186916 Digital audio system on a chip
08/24/2006US20060186915 Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals
08/24/2006DE202005020771U1 Logic circuit for use in microprocessor for execution of NAND operation, has logic units provided with inputs for supplying clock pulse in order to determine whether logic units are opened or closed
08/24/2006DE10232972B4 Halbleitervorrichtung Semiconductor device
08/24/2006DE10217375B4 Schaltungsanordnung und Verfahren zur Erzeugung eines Dual-Rail-Signals Circuit arrangement and method for generating a dual-rail signal
08/24/2006DE102005007579A1 Receiver circuit, for relaying data signals e.g. for computer and software applications, uses two inputs for coupling external digital data signal into receiver circuit