| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 02/12/2008 | US7330912 Configuration in a configurable system on a chip |
| 02/12/2008 | US7330709 Receiver circuit using nanotube-based switches and logic |
| 02/12/2008 | US7330062 Input/output logical circuit |
| 02/12/2008 | US7330053 Prestage for an off-chip driver (OCD) |
| 02/12/2008 | US7330052 Area efficient fractureable logic elements |
| 02/12/2008 | US7330051 Innovated technique to reduce memory interface write mode SSN in FPGA |
| 02/12/2008 | US7330050 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements |
| 02/12/2008 | US7330047 Receiver circuit arrangement having an inverter circuit |
| 02/12/2008 | US7330017 Driver for a power converter and a method of driving a switch thereof |
| 02/07/2008 | US20080031385 Clock data recovery circuitry associated with programmable logic device circuitry |
| 02/07/2008 | US20080030252 High Speed Clock Distribution Transmission Line Network |
| 02/07/2008 | US20080030234 Logic Circuit |
| 02/07/2008 | US20080030233 Stacked buffers |
| 02/07/2008 | US20080030232 Input/output circuit |
| 02/07/2008 | US20080030231 Level Shifter and Voltage Converting Device |
| 02/07/2008 | US20080030230 Apparatus and method to reduce voltage swing for control signals |
| 02/07/2008 | US20080030229 Fast ac coupled level translator |
| 02/07/2008 | US20080030228 Cells of a customizable logic array device having independently accessible circuit elements |
| 02/07/2008 | US20080030227 Reconfigurable IC that has Sections Running at Different Reconfiguration Rates |
| 02/07/2008 | US20080030226 Fpga powerup to known functional state |
| 02/07/2008 | US20080030225 Optically Reconfigurable Gate Array Write State Inspection Method, Write State Inspection Device, and Optically Reconfigurable Gate Array |
| 02/07/2008 | US20080030224 Logic with state retentive sleep mode |
| 02/07/2008 | US20080030223 Device and method to eliminate step response power supply perturbation |
| 02/07/2008 | US20080030222 Semiconductor Memory Device with Ability to Adjust Impedance of Data Output Driver |
| 02/07/2008 | US20080030221 Method of controlling on-die termination of memory devices sharing signal lines |
| 02/07/2008 | DE112006000251T5 Ausgangspuffer mit Anstiegsgeschwindigkeitssteuerung unter Anwendung einer invers prozessabhängigen Stromreferenz Output buffer with slew rate control using an inverse process-dependent current reference |
| 02/07/2008 | DE102007026710A1 Voltage converter for converting one signal to output another signal, has isolation circuit outputting substitution signal as output signal of level shifter, where output signal is irrelevant to floating input of level shifter |
| 02/06/2008 | EP1885066A2 Driver circuits for integrated circuit devices that are operable to reduce gate induced drain leakage (GIDL) current in a transistor and methods of operating the same |
| 02/06/2008 | EP1884094A1 Line driver with selectable power consumption |
| 02/06/2008 | EP1774654B1 Method and device for the connection of inputs for microcontrollers and corresponding microcontroller |
| 02/06/2008 | CN201018470Y Voltage level translation circuit |
| 02/06/2008 | CN101119114A Output buffer circuit |
| 02/06/2008 | CN101119113A Driver circuits for integrated circuit devices that are operable to reduce gate induced drain leakage current in a transistor and methods of operating the same |
| 02/06/2008 | CN100367670C Fast high voltage level shifter with gate oxide protection |
| 02/06/2008 | CN100367669C Signal level shift circuit |
| 02/06/2008 | CN100367260C Apparatus and method for bus signal termination compensation during detected quiet cycle |
| 02/05/2008 | US7328361 Digital bus synchronizer for generating read reset signal |
| 02/05/2008 | US7327169 Clocked inverter, NAND, NOR and shift register |
| 02/05/2008 | US7327168 Semiconductor device and driving method thereof |
| 02/05/2008 | US7327167 Anticipatory programmable interface pre-driver |
| 02/05/2008 | US7327166 Reference buffer with improved drift |
| 02/05/2008 | US7327165 Drive circuit of computer system for driving a mode indicator |
| 02/05/2008 | US7327164 Interface circuit |
| 02/05/2008 | US7327163 Voltage translator having minimized power dissipation |
| 02/05/2008 | US7327162 Operations with logical states from a four voltage level signal |
| 02/05/2008 | US7327161 Shift register |
| 02/05/2008 | US7327160 SERDES with programmable I/O architecture |
| 02/05/2008 | US7327159 Interface block architectures |
| 01/31/2008 | WO2008014417A2 Actively compensated buffering for high speed current mode logic data path |
| 01/31/2008 | WO2008014383A1 Junction field effect transistor level shifting circuit |
| 01/31/2008 | WO2008014380A2 Level shifting circuit having junction field effect transistors |
| 01/31/2008 | WO2008013098A1 Semiconductor integrated circuit, program converting apparatus and mapping apparatus |
| 01/31/2008 | US20080028268 Image display device and testing method of the same |
| 01/31/2008 | US20080025292 Secure network identity allocation |
| 01/31/2008 | US20080025091 Non-volatile memory cells in a field programmable gate array |
| 01/31/2008 | US20080024172 Actively Compensated Buffering for High Speed Current Mode Logic Data Path |
| 01/31/2008 | US20080024171 Switch sequencing circuit systems and methods |
| 01/31/2008 | US20080024170 Design structure for high speed differential receiver with an integrated multiplexer input |
| 01/31/2008 | US20080024169 Capacitive node isolation for electrostatic discharge circuit |
| 01/31/2008 | US20080024168 High speed transceiver with low power consumption |
| 01/31/2008 | US20080024167 Design structure for improved delay voltage level shifting for large voltage differentials |
| 01/31/2008 | US20080024166 Fast/slow state machine latch |
| 01/31/2008 | US20080024165 Configurable embedded multi-port memory |
| 01/31/2008 | US20080024164 Reconfigurable programmable logic device with P-channel non-volatile memory cells |
| 01/31/2008 | US20080024162 Constant impedance cmos output buffer |
| 01/31/2008 | US20080024161 Automatic bus management |
| 01/31/2008 | US20080024160 On-Chip Resistor Calibration For Line Termination |
| 01/31/2008 | US20080024009 Portable hand held multi-source power inverter with pass through device |
| 01/30/2008 | EP1883018A2 Apparatus and method for topography dependent signaling |
| 01/30/2008 | EP1882308A1 Integrated driver circuit structure |
| 01/30/2008 | EP1882307A2 Integrated circuit with signal bus formed by cell abutment of logic cells |
| 01/30/2008 | EP1882306A1 Integrated circuit, electronic device and integrated circuit control method |
| 01/30/2008 | CN101114831A Semiconductor integrated circuit |
| 01/30/2008 | CN101114830A State prewired circuit |
| 01/30/2008 | CN101114514A Differential circuit and output buffer circuit including the same |
| 01/30/2008 | CN101114435A Driver circuit |
| 01/30/2008 | CN100365939C Twelve bits counting compression circuit |
| 01/30/2008 | CN100365936C Semiconductor integrated circuit |
| 01/30/2008 | CN100365935C Voltage generating circuit, voltage generating device and semiconductor device using the same, and driving method thereof |
| 01/29/2008 | US7325169 Apparatus and method for trace stream identification of multiple target processor events |
| 01/29/2008 | US7325168 Trace data source identification within a trace data stream |
| 01/29/2008 | US7324097 Level shifter |
| 01/29/2008 | US7323923 Driver circuit |
| 01/29/2008 | US7323910 Circuit arrangement and method for producing a dual-rail signal |
| 01/29/2008 | US7323909 Automatic extension of clock gating technique to fine-grained power gating |
| 01/29/2008 | US7323908 Cascaded pass-gate test circuit with interposed split-output drive devices |
| 01/29/2008 | US7323906 Simultaneous bi-directional buffer including self-test circuit having function of generating input signal and self testing method of the simultaneous bi-directional buffer |
| 01/29/2008 | US7323904 Look-up table |
| 01/29/2008 | US7323903 Soft core control of dedicated memory interface hardware in a programmable logic device |
| 01/29/2008 | US7323902 Fracturable lookup table and logic element |
| 01/29/2008 | US7323901 Semiconductor integrated circuit device |
| 01/24/2008 | US20080022144 Data transfer control device and electronic instrument |
| 01/24/2008 | US20080018365 Coil Load Drive Output Circuit |
| 01/24/2008 | US20080018363 Semiconductor device including current-driven differential driver and method of controlling current-driven differential driver |
| 01/24/2008 | US20080018361 Semiconductor integrated circuit and method of fabricating the same |
| 01/24/2008 | US20080018360 High Speed Voltage Level Shifter Circuits |
| 01/24/2008 | US20080018359 Configurable IC's With Configurable Logic Resources That Have Asymmetric Inputs And/Or Outputs |
| 01/24/2008 | US20080018358 Circuit and method for power management |
| 01/24/2008 | US20080018357 Automatic termination circuit |
| 01/24/2008 | DE102007029073A1 Input circuit for determining logic state of integrated circuit input pin, has output unit that outputs input signal with determined voltage level at output terminal in period controlled by enable signal |