| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 08/11/2009 | US7574549 Bridge design for SD and MMC multiplexing |
| 08/11/2009 | US7573317 Apparatus and methods for adjusting performance of integrated circuits |
| 08/11/2009 | US7573300 Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same |
| 08/11/2009 | US7573299 Semiconductor integrated circuit including output circuit |
| 08/11/2009 | US7573298 Signal transmission circuit, data transfer control device and electronic device |
| 08/11/2009 | US7573297 Flexible macrocell interconnect |
| 08/11/2009 | US7573296 Configurable IC with configurable routing resources that have asymmetric input and/or outputs |
| 08/11/2009 | US7573295 Hard macro-to-user logic interface |
| 08/11/2009 | US7573294 Programmable logic based latches and shift registers |
| 08/11/2009 | US7573293 Programmable logic based latches and shift registers |
| 08/11/2009 | US7573292 Pre-programmed integrated circuit including programmable logic |
| 08/11/2009 | US7573291 Programmable logic device with enhanced logic block architecture |
| 08/11/2009 | US7573290 Data output driver for reducing noise |
| 08/11/2009 | US7573289 Impedance matching circuit and semiconductor memory device with the same |
| 08/06/2009 | WO2009097315A1 Level shifting circuit and method |
| 08/06/2009 | WO2009096247A1 Multi-branching prediction method and device |
| 08/06/2009 | WO2009096192A1 Buffer circuit and image sensor chip comprising the same, and image pickup device |
| 08/06/2009 | WO2009095858A1 Electronic clamps for integrated circuits and methods of use |
| 08/06/2009 | US20090198759 Circuits for computational set theory |
| 08/06/2009 | US20090195270 Output buffer device |
| 08/06/2009 | US20090195269 Input stage for mixed-voltage-tolerant buffer with reduced leakage |
| 08/06/2009 | US20090195268 Level Shifting Circuit and Method |
| 08/06/2009 | US20090195267 High-Voltage tolerant output driver |
| 08/06/2009 | US20090195266 High voltage stress test circuit |
| 08/06/2009 | DE102005014460B4 Hochzuverlässiges Speicherelement mit verbesserter Verzögerungszeit Highly reliable memory element with improved delay time |
| 08/06/2009 | DE102005011859B4 Ein Entwurf eines dreifach redundanten Latches mit niedriger Verzögerungszeit A design of a triple redundant latches with low delay time |
| 08/05/2009 | EP2085892A1 Processing circuit |
| 08/05/2009 | CN101501994A Resilient integrated circuit architecture |
| 08/05/2009 | CN101499788A Single particle upset and single particle transient pulse resisiting D trigger |
| 08/05/2009 | CN101499474A Semiconductor device |
| 08/05/2009 | CN101499255A Image display system |
| 08/05/2009 | CN101499248A LCD, LCD driving circuit and driving method thereof |
| 08/05/2009 | CN100525107C Buffer and a data driving circuit using the same |
| 08/05/2009 | CN100525106C Level shifter, level shift circuit, electro-optical device, and electronic apparatus |
| 08/05/2009 | CN100524777C Mask-programmable logic macro |
| 08/05/2009 | CN100524752C Semiconductor device and correlation product thereof |
| 08/04/2009 | US7571413 Testing circuitry for programmable logic devices with selectable power supply voltages |
| 08/04/2009 | US7570510 Multi-bit spin memory |
| 08/04/2009 | US7570120 Multichannel memory-based numerically controlled oscillators |
| 08/04/2009 | US7570106 Substrate voltage generating circuit with improved level shift circuit |
| 08/04/2009 | US7570081 Multiple-output static logic |
| 08/04/2009 | US7570080 Set dominant latch with soft error resiliency |
| 08/04/2009 | US7570079 Level-restoring buffers for programmable interconnect circuits and method for building the same |
| 08/04/2009 | US7570078 Programmable logic device providing serial peripheral interfaces |
| 08/04/2009 | US7570077 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements |
| 08/04/2009 | US7570076 Segmented programmable capacitor array for improved density and reduced leakage |
| 08/04/2009 | US7570075 Ultra fast differential transimpedance digital amplifier for superconducting circuits |
| 08/04/2009 | US7570071 Impedance calibration for source series terminated serial link transmitter |
| 08/04/2009 | US7569881 Semiconductor integrated circuit device with reduced leakage current |
| 07/30/2009 | US20090192041 Systems, devices, and methods for controllably coupling qubits |
| 07/30/2009 | US20090189682 Method and apparatus for mode selection for high voltage integrated circuits |
| 07/30/2009 | US20090189643 Constant voltage generating device |
| 07/30/2009 | US20090189642 Nanowire Crossbar Implementations of logic Gates using configurable, tunneling resistor junctions |
| 07/30/2009 | US20090189641 Integrated circuit device and layout design method therefor |
| 07/30/2009 | US20090189640 Semiconductor Device |
| 07/30/2009 | US20090189639 Circuits and methods for communicating data between domains during voltage and frequency shifting |
| 07/30/2009 | US20090189638 Level shifter circuit |
| 07/30/2009 | US20090189637 Machine for programming on-board chipsets |
| 07/30/2009 | US20090189636 Circuit having logic state retention during power-down and method therefor |
| 07/30/2009 | US20090189635 Method and apparatus for implementing reduced coupling effects on single ended clocks |
| 07/30/2009 | US20090189634 Single event transient mitigation and measurement in integrated circuits |
| 07/30/2009 | US20090189633 Superconductive crossbar switch |
| 07/30/2009 | DE10349464B4 Pegelumsetz-Einrichtung Pegelumsetz device |
| 07/30/2009 | DE102008002758A1 Relaisschaltung Relay circuit |
| 07/30/2009 | DE102004049744B4 Schaltungsanordnung Circuitry |
| 07/29/2009 | EP2082485A2 System for the flexible configuration of functional modules |
| 07/29/2009 | EP2082484A2 Dual mode aes implementation to support single and multiple aes operations |
| 07/29/2009 | EP1415399B1 Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements |
| 07/29/2009 | CN101496283A Semiconductor integrated circuit, program converting apparatus and mapping apparatus |
| 07/29/2009 | CN101496282A Reference buffer with improved drift |
| 07/29/2009 | CN101494455A Multi-hierarchy FPGA |
| 07/29/2009 | CN101494454A Image display system |
| 07/29/2009 | CN101494453A Differential driving circuit capable of operating at low supply voltage without requiring common mode reference voltage |
| 07/29/2009 | CN101494452A Input/output (I/O) buffer and semiconductor structure thereof |
| 07/29/2009 | CN100521539C Semiconductor integrated circuit |
| 07/29/2009 | CN100521538C Differential output structure with decreased bias under single input |
| 07/29/2009 | CN100520430C Interface circuit of coupling semiconductor test apparatus and semiconductor device to be tested |
| 07/28/2009 | US7568177 System and method for power gating of an integrated circuit |
| 07/28/2009 | US7568084 Semiconductor integrated circuit including multiple basic cells formed in arrays |
| 07/28/2009 | US7567891 Hot-carrier device degradation modeling and extraction methodologies |
| 07/28/2009 | US7567096 Circuit device and method of controlling a voltage swing |
| 07/28/2009 | US7567095 Safe output circuit with a one-channel peripheral terminal for the ouput of a bus user |
| 07/28/2009 | US7567094 Tri-stated driver for bandwidth-limited load |
| 07/28/2009 | US7566859 Infrared ray switching device |
| 07/23/2009 | WO2009091928A2 Layout method for soft-error hard electronics, and radiation hardened logic cell |
| 07/23/2009 | US20090184734 Method of Producing and Operating a Low Power Junction Field Effect Transistor |
| 07/23/2009 | US20090184733 Layout method for soft-error hard electronics, and radiation hardened logic cell |
| 07/23/2009 | US20090184732 Differential driving circuit capable of operating at low supply voltage without requiring common mode reference voltage |
| 07/23/2009 | US20090184731 Apparatus and method of adjusting driving voltage for selective pre-charge |
| 07/23/2009 | DE10223763B4 Halbleitervorrichtung Semiconductor device |
| 07/22/2009 | EP1348257B1 Device with segmented cell structure |
| 07/22/2009 | CN101490959A Dynamic peripheral function remapping to external input-output connections of an integrated circuit device |
| 07/22/2009 | CN101488748A Field programmable gate array |
| 07/22/2009 | CN101488747A A LUT construct and FPGA |
| 07/22/2009 | CN101488746A Field programmable gate array |
| 07/22/2009 | CN101488745A Method for reducing area of digital logic circuit |
| 07/22/2009 | CN101488744A Output driving buffer capable of reducing noise of electric power line and ground line |
| 07/22/2009 | CN101488743A Ground bounce effect resisting output circuit |
| 07/22/2009 | CN101488742A Electric level converting apparatus and method |
| 07/22/2009 | CN101488741A Circuit and circuit design method |