Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
06/2009
06/02/2009US7541838 Transmitter swing control circuit and method
06/02/2009US7541837 Voltage level shifter circuit
06/02/2009US7541836 Binary boolean output on input with more than two states
06/02/2009US7541835 Circuit technique to achieve power up tristate on a memory bus
06/02/2009US7541834 System and the methods of managing a set of programmable fuses on an integrated circuit
06/02/2009US7541833 Validating partial reconfiguration of an integrated circuit
06/02/2009US7541832 Low power, race free programmable logic arrays
06/02/2009US7541830 Device for a line termination of two-wire lines
06/02/2009CA2536624C Programmable logic device including programmable multi-gigabit transceivers
06/02/2009CA2515464C Fpga architecture with mixed interconnect resources
05/2009
05/28/2009WO2009067470A2 Charge recycling a 1 of n ndl gate with a time varying power supply
05/28/2009WO2009066984A2 Read-out interface circuit for multiple ions sensing
05/28/2009WO2009066627A1 Thin-film transistor circuit, driving method thereof, and light-emitting display apparatus
05/28/2009WO2009066500A1 Semiconductor device configuration method
05/28/2009WO2009066431A1 Fabrication system of semiconductor integrated circuit, fabrication device, fabrication method, integrated circuit and communication system
05/28/2009WO2009066419A1 Reconfigurable circuit, reconfigurable circuit function modification method, and communication device
05/28/2009WO2009066405A1 Reconfigurable circuit device and receiving apparatus
05/28/2009US20090138749 Hypertransport/SPI-4 Interface Supporting Configurable Deskewing
05/28/2009US20090135643 Seu hardening circuit and method
05/28/2009US20090134912 Adjustable hold flip flop and method for adjusting hold requirements
05/28/2009US20090134911 Drive method for driving element having capacity impedance, drive device, and imaging device
05/28/2009US20090134910 Reconfigurable logic structures
05/28/2009US20090134909 Programmable structured arrays
05/28/2009US20090134908 Multi-Functional Logic Gate Device and Programmable Integrated Circuit Device Using the Same
05/28/2009US20090134907 Fault Tolerant Integrated Circuit Architecture
05/28/2009US20090134906 Resilient Integrated Circuit Architecture
05/27/2009EP1449095B1 Adaptive integrated circuit having fixed computational elements and method for configuration and operation of such an integrated circuit
05/27/2009CN201247066Y Apparatus for rapidly extracting small signal
05/27/2009CN101444001A Single electron based flexible multi-functional logic circuit and the transistor thereof
05/27/2009CN101442687A Circuit for indicating veneer status
05/27/2009CN101442309A Analog probability same-effect gate circuit designed using CMOS transistor
05/27/2009CN101442308A Protection device for losing lock of FPGA build-in time-delay phase-locked loop
05/27/2009CN101442307A Level shifter
05/27/2009CN101442306A On-chip terminal connection circuit
05/27/2009CN101442302A Gate drive circuit and drive method thereof
05/27/2009CN101441488A Voltage regulator and controlling method thereof
05/27/2009CN100493096C Interface apparatus
05/27/2009CN100492910C Level converter using base bias
05/26/2009US7539967 Self-configuring components on a device
05/26/2009US7539965 Circuit layout with active components and high breakdown voltage
05/26/2009US7539802 Integrated circuit device and signaling method with phase control based on information in external memory device
05/26/2009US7538583 High voltage integrated circuit driver with a high voltage PMOS bootstrap diode emulator
05/26/2009US7538582 Driver circuit, test apparatus and adjusting method
05/26/2009US7538581 Fast AC coupled level translator
05/26/2009US7538580 Logic array devices having complex macro-cell architecture and methods facilitating use of same
05/26/2009US7538579 Omnibus logic element
05/26/2009US7538578 Multiple data rates in programmable logic device serial interface
05/26/2009US7538577 System and method for configuring a field programmable gate array
05/26/2009US7538576 Non-volatile look-up table for an FPGA
05/26/2009US7538575 Three dimensional integrated circuits
05/26/2009US7538574 Transparent field reconfiguration for programmable logic devices
05/26/2009US7538572 Off-chip driver apparatus, systems, and methods
05/26/2009CA2476175C Floor planning for programmable gate array having embedded fixed logic circuitry
05/26/2009CA2398601C Method and circuit for providing interface signals between integrated circuits
05/22/2009WO2009063853A1 Intra/inter chip communication circuit, communication method, and three-dimensional lsi device
05/22/2009WO2009063596A1 Reconfigurable circuit, reset method, and configuration information generation device
05/22/2009WO2009063584A1 Programmable device, control method of device and information processing system
05/22/2009WO2009063527A2 Logic gate with a reduced number of switches, especially for applications in integrated circuits
05/22/2009WO2009063274A1 System and method to improve switching in power switching applications
05/22/2009WO2009062496A1 Reconfigurable floating-point and bit level data processing unit
05/22/2009WO2008134225A3 Integrated circuit switching device, structure and method of manufacture
05/21/2009US20090128380 Current-controlled CMOS logic family
05/21/2009US20090128192 Data receiver of semiconductor integrated circuit and method for controlling the same
05/21/2009US20090128191 Ultra-low-power level shifter, voltage transform circuit and rfid tag including the same
05/21/2009US20090128190 Implementing Logic Functions with Non-Magnitude Based Physical Phenomena
05/21/2009US20090128189 Three dimensional programmable devices
05/21/2009US20090128188 Pad invariant FPGA and ASIC devices
05/21/2009US20090128186 Programmable system on a chip for power-supply voltage and current monitoring and control
05/21/2009US20090128185 On-die termination circuit and driving method thereof
05/20/2009EP2061151A1 Multi-phase level shift system
05/20/2009EP1743422A4 Low leakage and data retention circuitry
05/20/2009EP1696567B1 Level shift circuit, actuator apparatus using the same, and optical switch system
05/20/2009EP1628399B1 Semiconductor device
05/20/2009DE102008056848A1 Schreib-Treiberschaltkreis und Verfahren zum Herstellen eines Schreib-Treiberschaltkreises Write driver circuit and method for manufacturing a write driver circuit
05/20/2009DE102007056106A1 Complementary MOS output stage, has inverters, NAND and NOR gates controlling transistors such that transistors conduct during rise time/fall time of digital output signal, which is emitted at output of stage
05/20/2009CN201243268Y Logic circuit for decreasing encode error rate of variable impulse-duration system
05/20/2009CN201239535Y Hall type electronic chessboard
05/20/2009CN101438497A Multiphase level shift system
05/20/2009CN101438496A System and method of power distribution control of an integrated circuit
05/20/2009CN101436855A Level shift circuit and method thereof
05/20/2009CN100490325C Voltage converting circuit
05/20/2009CN100489797C Error detection on programmable logic equipment
05/19/2009US7536666 Integrated circuit and method of routing a clock signal in an integrated circuit
05/19/2009US7536289 Method of configuring information processing system and semiconductor integrated circuit
05/19/2009US7535467 Analog buffer, display device having the same, and method of driving the same
05/19/2009US7535282 Dynamic well bias controlled by Vt detector
05/19/2009US7535280 Apparatus and method for shifting a signal from a first reference level to a second reference level
05/19/2009US7535261 Logic circuit
05/19/2009US7535260 Logic gates, scan drivers and organic light emitting displays using the same
05/19/2009US7535259 Clocked inverter, NAND, NOR and shift register
05/19/2009US7535258 Programmable current output and common-mode voltage buffer
05/19/2009US7535257 Receiver circuit, interface circuit, and electronic instrument
05/19/2009US7535256 Cross-level digital signal transmission device
05/19/2009US7535254 Reconfiguration of a hard macro via configuration registers
05/19/2009US7535253 Register data retention systems and methods during reprogramming of programmable logic devices
05/19/2009US7535252 Configurable ICs that conditionally transition through configuration data sets
05/19/2009US7535251 Semiconductor device and impedance adjusting method thereof
05/19/2009US7535250 Output impedance calibration circuit with multiple output driver models
05/19/2009US7535130 Method and apparatus for mode selection for high voltage integrated circuits
05/19/2009CA2395337C Vital "and" gate apparatus and method