| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 07/22/2009 | CN100517971C Bootstrap circuit and driving method thereof |
| 07/22/2009 | CN100517970C Output driver with low ground jump noise |
| 07/22/2009 | CN100517957C Signal amplifier |
| 07/22/2009 | CA2619514A1 A multifunction recursive circuit for fast addition, lead-digit detection, incrementation and comparison and its systematic design |
| 07/21/2009 | US7565590 Logic circuit protected against transitory perturbations |
| 07/21/2009 | US7565468 Integrated circuit memory device and signaling method for adjusting drive strength based on topography of integrated circuit devices |
| 07/21/2009 | US7564270 Differential output driver |
| 07/21/2009 | US7564269 Integrated nanotube and field effect switching devices |
| 07/21/2009 | US7564268 Low power logic output buffer |
| 07/21/2009 | US7564267 Thermal electric logic circuit |
| 07/21/2009 | US7564266 Logic state catching circuits |
| 07/21/2009 | US7564265 Semiconductor device with its test time reduced and a test method therefor |
| 07/21/2009 | US7564264 Preventing transistor damage |
| 07/21/2009 | US7564263 High-speed logic signal level shifter |
| 07/21/2009 | US7564262 Crossbar comparator |
| 07/21/2009 | US7564261 Embedding memory between tile arrangement of a configurable IC |
| 07/21/2009 | US7564260 VPA interconnect circuit |
| 07/21/2009 | US7564259 Digital circuit with dynamic power and performance control via per-block selectable operating voltage |
| 07/21/2009 | US7564258 Calibration methods and circuits to calibrate drive current and termination impedance |
| 07/20/2009 | CA2664620A1 Pseudo-random bit sequence generator |
| 07/16/2009 | WO2009088695A2 Extending drive capability in integrated circuits utilizing programmable-voltage output circuits |
| 07/16/2009 | WO2009087450A2 System and method for reducing eme emissions in digital desynchronized circuits |
| 07/16/2009 | WO2009061944A3 A variability-aware scheme for asynchronous circuit initialization |
| 07/16/2009 | US20090179693 Semiconductor device |
| 07/16/2009 | US20090179692 Semiconductor integrated circuit device operating with low power consumption |
| 07/16/2009 | US20090179669 Techniques for Providing Switchable Decoupling Capacitors for an Integrated Circuit |
| 07/16/2009 | US20090179668 Bridge design for sd and mmc multiplexing |
| 07/16/2009 | US20090179667 Reconfigurable logic circuit |
| 07/16/2009 | US20090179666 Output buffer circuit, differential output buffer circuit, output buffer circuit having regulation circuit and regulation function, and transmission method |
| 07/16/2009 | US20090179665 Output driver robust to data dependent noise |
| 07/16/2009 | US20090179664 Method and Apparatus for Controlling Leakage in a Circuit |
| 07/15/2009 | EP2079167A1 Method and apparatus for controlling leakage in a circuit |
| 07/15/2009 | EP2079162A1 Apparatus and method having reduced flicker noise |
| 07/15/2009 | EP2079109A2 Design method for semiconductor integrated circuit |
| 07/15/2009 | EP1247342B1 Circuit and method for input to failsafe "and" gate |
| 07/15/2009 | CN101485089A Electronic circuit and method therefor |
| 07/15/2009 | CN101485088A Very low power analog compensation circuit |
| 07/15/2009 | CN101483428A Reconfigurable logic circuit |
| 07/15/2009 | CN101483427A Isolative transmission circuit |
| 07/15/2009 | CN101483426A Output driving circuit |
| 07/15/2009 | CN100514862C Non-reverse dominoes register and temporary storage method thereof |
| 07/15/2009 | CN100514317C Signal transmitting device suitable for fast signal transmission |
| 07/14/2009 | US7562345 Firmware management tool |
| 07/14/2009 | US7562331 Netlist synthesis and automatic generation of PC board schematics |
| 07/14/2009 | US7562318 Test structure for automatic dynamic negative-bias temperature instability testing |
| 07/14/2009 | US7562275 Tri-level test mode terminal in limited terminal environment |
| 07/14/2009 | US7561655 Shift register circuit and method of operating the same |
| 07/14/2009 | US7560975 Semiconductor device |
| 07/14/2009 | US7560957 High-speed CML circuit design |
| 07/14/2009 | US7560956 Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals |
| 07/14/2009 | US7560955 Logic circuit |
| 07/14/2009 | US7560954 Programmable system on a chip for temperature monitoring and control |
| 07/14/2009 | US7560953 Power management systems and methods for programmable logic devices |
| 07/14/2009 | US7560952 Integrated circuit device having state-saving and initialization feature |
| 07/09/2009 | WO2009086462A2 System and method of leakage control in an asynchronous system |
| 07/09/2009 | WO2009085374A2 Formation of a hybrid integrated circuit device |
| 07/09/2009 | WO2009063527A3 Logic gate with a reduced number of switches, especially for applications in integrated circuits |
| 07/09/2009 | WO2009030997A3 Hardening of self-timed circuits against glitches |
| 07/09/2009 | US20090175443 Secure function evaluation techniques for circuits containing XOR gates with applications to universal circuits |
| 07/09/2009 | US20090175073 Nanostructure-Based Memory |
| 07/09/2009 | US20090174468 Thermal Sensing Circuit Using Bandgap Voltage Reference Generators Without Trimming Circuitry |
| 07/09/2009 | US20090174435 Monolithically-Integrated Graphene-Nano-Ribbon (GNR) Devices, Interconnects and Circuits |
| 07/09/2009 | US20090174434 Design method and architecture for power gate switch placement |
| 07/09/2009 | US20090174433 PECL/LVPECL input buffer that employs positive feedback to provide input hysteresis, symmetric headroom, and high noise immunity |
| 07/09/2009 | US20090174432 System for Providing a Complementary Metal-Oxide Semiconductor (CMOS) Emitter Coupled Logic (ECL) Equivalent Input/Output (I/O) Circuit |
| 07/09/2009 | US20090174431 Method and apparatus for universal program controlled bus architecture |
| 07/09/2009 | US20090174430 Logic element, and integrated circuit or field programmable gate array |
| 07/09/2009 | US20090174429 Programmable logic device structure using third dimensional memory |
| 07/09/2009 | US20090174428 Programmable element, and memory device or logic circuit |
| 07/09/2009 | CA2704707A1 Formation of a hybrid integrated circuit device |
| 07/08/2009 | EP2077619A2 System for providing a complementary metal-oxide semiconductor (CMOS) emitter coupled logic (ECL) equivalent input/output (I/O) circuit |
| 07/08/2009 | EP2007013A9 Three-valued logic function circuit |
| 07/08/2009 | EP1435693B1 Amplification circuit |
| 07/08/2009 | CN101479942A Muller-c element |
| 07/08/2009 | CN101479941A System and method of silicon switched power delivery using a package |
| 07/08/2009 | CN101478306A Driving circuit slew rate compensation apparatus and method |
| 07/08/2009 | CN100512243C Apparatus and method for power efficient line driver |
| 07/08/2009 | CN100512006C Source electrode drive circuit, latch voltage bit quasi converter and high voltage trigger |
| 07/08/2009 | CN100511936C 负电压输出电路 Negative voltage output circuit |
| 07/07/2009 | US7557634 Low-power consumption high-voltage CMOS driving circuit |
| 07/07/2009 | US7557618 Conditioning logic technology |
| 07/07/2009 | US7557617 Digital decoder with complementary outputs |
| 07/07/2009 | US7557616 Limited switch dynamic logic cell based register |
| 07/07/2009 | US7557615 High-speed serial data transmitter architecture |
| 07/07/2009 | US7557614 Topology for a n-way XOR/XNOR circuit |
| 07/07/2009 | US7557613 Scalable non-blocking switching network for programmable logic |
| 07/07/2009 | US7557612 Block symmetrization in a field programmable gate array |
| 07/07/2009 | US7557611 Block level routing architecture in a field programmable gate array |
| 07/07/2009 | US7557610 Columnar floorplan |
| 07/07/2009 | US7557609 Configurable integrated circuit with different connection schemes |
| 07/07/2009 | US7557608 Passgate structures for use in low-voltage applications |
| 07/07/2009 | US7557607 Interface device reset |
| 07/07/2009 | US7557606 Synchronization of data signals and clock signals for programmable logic devices |
| 07/07/2009 | US7557605 Heterogeneous configurable integrated circuit |
| 07/07/2009 | US7557604 Input circuit for mode setting |
| 07/07/2009 | US7557603 Method and apparatus for output driver calibration, and memory devices and system embodying same |
| 07/07/2009 | US7557602 Pre-emphasis circuit including slew rate controllable buffer |
| 07/07/2009 | US7557601 Memory module and method having improved signal routing topology |
| 07/07/2009 | US7557600 Programmable Josephson voltage standard device employing microwave driving of multiple frequencies |
| 07/07/2009 | US7557553 Power supply circuit and control method thereof |