Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
07/2009
07/02/2009WO2009081619A1 Buffer and display device
07/02/2009WO2009061913A3 A variability-aware asynchronous scheme based on two-phase protocols
07/02/2009US20090168575 Device and method to reduce simultaneous switching noise
07/02/2009US20090167404 Semiconductor Device, Electronic Device Having the Same, and Driving Method of the Same
07/02/2009US20090167359 Current mode logic circuit and control apparatus therefor
07/02/2009US20090167358 Fully interruptible domino latch
07/02/2009US20090167357 Extending drive capability in integrated circuits utilizing programmable-voltage output circuits
07/02/2009US20090167356 Monolithically integrated multiplexer-translator-demultiplexer circuit and method
07/02/2009US20090167355 High performance pulsed buffer
07/02/2009US20090167354 Non-Sequentially Configurable IC
07/02/2009US20090167353 State machines using resistivity-sensitive memories
07/02/2009US20090167352 Field programmable gate arrays using resistivity sensitive memories
07/02/2009US20090167350 Programmable logic based latches and shift registers
07/02/2009US20090167349 Programmable logic based latches and shift registers
07/02/2009US20090167348 Programmable latch based multiplier
07/02/2009US20090167347 Using programmable latch to implement logic
07/02/2009US20090167346 Reconfigurable circuit, configuration method and program
07/02/2009US20090167345 Reading configuration data from internal storage node of configuration storage circuit
07/02/2009US20090167344 Data output driving circuit of semiconductor apparatus
07/02/2009US20090167343 Minimizing leakage in logic designs
07/02/2009US20090167342 Analog processor comprising quantum devices
07/02/2009US20090166646 Light-emitting element having pnpn-structure and light-emitting element array
07/02/2009DE112007001946T5 Lastschwankung-Kompensationsschaltung, elektronische Vorrichtung, Prüfvorrichtung, Taktgeneratorschaltung und Lastschwankungs-Kompensationsverfahren Load fluctuation compensation circuit, electronic device testing apparatus, the clock generator circuit and load fluctuation compensation method
07/02/2009DE10084545B4 Spannungsversorgungsschaltung mit niedrigem Leckstrom für eine integrierte Schaltung zur Verwendung bei einem Fortgeschrittenen CMOS-Prozess Voltage supply circuit with low leakage current for an integrated circuit for use in an advanced CMOS process
07/01/2009EP2075915A1 Flexible layout for integrated mask-programmable logic devices and manufacturing process thereof
07/01/2009EP2075914A2 Read circuit, variable resistive element device, and imaging device
07/01/2009EP2075913A2 Read circuit, variable resistive element device, and imaging device
07/01/2009EP2074757A1 Routing facility for a subsea electronics module
07/01/2009EP1559196A4 A fast controlled output buffer
07/01/2009EP1464118B1 Fpga and embedded circuitry initialization and processing
07/01/2009CN201266921Y Pulsewidth suppressing circuit and audio power amplifier
07/01/2009CN101471655A Current mode logic circuit and control apparatus therefor
07/01/2009CN101471654A Leakage output buffer for univoltage supply cmos
07/01/2009CN101471653A Input buffer applying to high voltage signal
07/01/2009CN101471652A Semiconductor integrated circuit
07/01/2009CN101471651A Monolithically integrated multiplexer-translator-demultiplexer circuit and method
07/01/2009CN100508394C Low-voltage differential signal driver with front-set intensifying circuit
07/01/2009CN100508153C Test method of semiconductor integrated circuit device
07/01/2009CN100507941C Semiconductor device and driving method thereof
06/2009
06/30/2009US7554364 High-voltage operational amplifier input stage and method
06/30/2009US7554363 High speed integrated circuit
06/30/2009US7554362 Semiconductor device, driving method thereof and electronic device
06/30/2009US7554361 Level shifter and method thereof
06/30/2009US7554360 High speed level shifter circuit in advanced CMOS technology
06/30/2009US7554359 Circuit for inspecting semiconductor device and inspecting method
06/30/2009US7554357 Efficient configuration of daisy-chained programmable logic devices
06/30/2009US7554356 Adding or subtracting inputs using a carry signal with a fixed value of logic 0
06/25/2009WO2009079146A1 Replica bias circuit for high speed low voltage common mode driver
06/25/2009WO2009078242A1 Non-volatile latch circuit and logic circuit using the same
06/25/2009WO2009078081A1 Semiconductor integrated circuit
06/25/2009WO2009078069A1 Semiconductor device
06/25/2009WO2009060190A3 Configurable electronic device and method
06/25/2009US20090161428 Load balancing by using clock gears
06/25/2009US20090161402 Data storage and stackable configurations
06/25/2009US20090161317 Portable hand held multi-source power inverter with pass through device
06/25/2009US20090160543 Noise protector
06/25/2009US20090160486 High speed electronic data transmission system
06/25/2009US20090160485 Providing Higher-Swing Output Signals When Components Of An Integrated Circuit Are Fabricated Using A Lower-Voltage Process
06/25/2009US20090160484 Input buffer
06/25/2009US20090160483 Field programmable application specific integrated circuit with programmable logic array and method of designing and programming the programmable logic array
06/25/2009US20090160482 Formation of a hybrid integrated circuit device
06/25/2009US20090160481 Configurable Circuits, IC's and Systems
06/25/2009US20090160480 Termination circuit
06/25/2009DE10361808B4 Eingabe-/Ausgabeschaltung zur gleichzeitigen bidirektionalen Datenübertragung, integrierte Schaltung, System und Dekodierverfahren Input / output circuit for simultaneous bidirectional data transmission, integrated circuit, system, and decoding
06/25/2009DE102004020987B4 Pegelschieberschaltung Level shifter circuit
06/24/2009EP2073388A1 Noise-tolerant signaling schemes supporting simplified timing and data recovery
06/24/2009EP2073266A1 Drive method of nanogap switching element and storage apparatus equipped with nanogap switching element
06/24/2009CN201263144Y Current mode level switching circuit for N channel power MOS tube drive chip
06/24/2009CN101467352A Circuit configurations having four terminal jfet devices
06/24/2009CN101467351A Tri-stated driver for bandwidth-limited load
06/24/2009CN101465644A Output driver circuit
06/24/2009CN101465643A Level shift circuit, and driver and display system using the same
06/24/2009CN101465642A Change-over circuit from CMOS to MCML
06/24/2009CN101465641A Electric potential transfer circuit and method
06/24/2009CN100505544C AB operation buffer
06/24/2009CN100505543C Output buffer circuit of logic gate including balance output node
06/24/2009CN100505526C Low voltage circuit for interfacing with high voltage analog signals
06/24/2009CN100505458C Fuse circuit
06/24/2009CN100505212C Standard cell, semiconductor integrated circuit device and layout design method for semiconductor integrated circuit device
06/24/2009CN100505017C Converting voltage level circuit and method
06/23/2009US7552404 Semiconductor integrated device and apparatus for designing the same
06/23/2009US7552370 Application specific distributed test engine architecture system and method
06/23/2009US7551002 Method and apparatus for implementing balanced clock distribution networks on ASICs with voltage islands functioning at multiple operating points of voltage and temperature
06/23/2009US7551001 Reconfigurable semiconductor integrated circuit and processing assignment method for the same
06/23/2009US7551000 Differential bidirectional transceiver and receiver therein
06/23/2009US7550999 Receiver capable of increasing operation speed with suppressing increase of power consumption
06/23/2009US7550998 Inverter circuit having a feedback switch and methods corresponding thereto
06/23/2009US7550997 4-level logic decoder
06/23/2009US7550996 Structured integrated circuit device
06/23/2009US7550995 Method and system for using boundary scan in a programmable logic device
06/23/2009US7550994 Programmable logic device with on-chip nonvolatile user memory
06/23/2009US7550993 Glitch reduced compensated circuits and methods for using such
06/23/2009US7550992 Logic cell with two isolated redundant outputs, and corresponding integrated circuit
06/23/2009US7550991 Configurable IC with trace buffer and/or logic analyzer functionality
06/23/2009US7550324 Interface port for electrically programmed fuses in a programmable logic device
06/18/2009WO2009076476A1 Hardened current mode logic (cml) voter circuit, system and method
06/18/2009WO2009075810A2 Avoiding floating diffusion contamination
06/18/2009US20090153194 Clock circuitry
06/18/2009US20090153193 Bi-directional buffer with level shifting
06/18/2009US20090153192 Bi-directional buffer for open-drain or open-collector bus