| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 06/18/2009 | US20090153191 Pre-driver logic |
| 06/18/2009 | US20090153190 Voltage Control |
| 06/18/2009 | US20090153189 Universal serial bus wakeup circuit |
| 06/18/2009 | US20090153188 PROCESS FOR AUTOMATIC DYNAMIC RELOADING OF DATA FLOW PROCESSORS (DFPs) AND UNITS WITH TWO- OR THREE-DIMENSIONAL PROGRAMMABLE CELL ARCHITECTURES (FPGAs, DPGAs AND THE LIKE) |
| 06/18/2009 | US20090153187 Monolithically integrated interface circuit |
| 06/18/2009 | US20090153186 On-die-termination control circuit and method |
| 06/18/2009 | US20090153182 Semiconductor device |
| 06/18/2009 | US20090153181 Data retention kill function |
| 06/18/2009 | US20090153180 Single flux quantum circuits |
| 06/17/2009 | EP2071728A1 Risa controller for an RF integrated circuit (RFIC) having improved execution speed |
| 06/17/2009 | EP1504537B1 High speed configurable transceiver architecture |
| 06/17/2009 | CN101459425A Electric level shift circuit |
| 06/17/2009 | CN101459424A Input output device for mixed-voltage tolerant |
| 06/17/2009 | CN101459423A Output driver circuit with output preset circuit and controlling method thereof having lower power consumption |
| 06/17/2009 | CN100502243C Signal electric potential switching circuit |
| 06/16/2009 | US7549139 Tuning programmable logic devices for low-power design implementation |
| 06/16/2009 | US7549138 Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA |
| 06/16/2009 | US7549068 Data processing apparatus and method for operating a dual rail circuit component in a security mode and power saving mode |
| 06/16/2009 | US7548108 Semiconductor integrated circuit device with dual insulation system |
| 06/16/2009 | US7548095 Isolation scheme for static and dynamic FPGA partial programming |
| 06/16/2009 | US7548094 Systems and methods for on-chip signaling |
| 06/16/2009 | US7548093 Scheme of level shifter cell |
| 06/16/2009 | US7548092 Implementing logic functions with non-magnitude based physical phenomena |
| 06/16/2009 | US7548091 Method and apparatus to power down unused configuration random access memory cells |
| 06/16/2009 | US7548090 Configurable IC with packet switch network |
| 06/16/2009 | US7548088 Systems and methods for current management for digital logic devices |
| 06/16/2009 | US7548087 Impedance adjusting circuit and impedance adjusting method |
| 06/16/2009 | US7548086 Impedance control circuit in semiconductor device and impedance control method |
| 06/16/2009 | US7548085 Random access of user design states in a configurable IC |
| 06/16/2009 | US7548084 Fault tolerant integrated circuit architecture |
| 06/11/2009 | WO2009072041A1 Semiconductor device and apparatus including semiconductor device |
| 06/11/2009 | WO2009071965A1 Semiconductor device and apparatus including semiconductor device |
| 06/11/2009 | WO2003034589A3 Digital level shifter with reduced power dissipation and false transmission blocking |
| 06/11/2009 | US20090146734 Charge Recycling (CR) in Power Gated Complementary Metal-Oxide-Semiconductor (CMOS) Circuits and in Super Cutoff CMOS (SCCMOS) Circuits |
| 06/11/2009 | US20090146693 Semiconductor integrated circuit |
| 06/11/2009 | US20090146692 Structure for apparatus for reduced loading of signal transmission elements |
| 06/11/2009 | US20090146691 Logic cell array and bus system |
| 06/11/2009 | US20090146690 Runtime configurable arithmetic and logic cell |
| 06/11/2009 | US20090146689 Configuration Context Switcher with a Clocked Storage Element |
| 06/11/2009 | US20090146688 Methods of reducing power in programmable devices using low voltage swing for routing signals |
| 06/11/2009 | US20090146687 Integrated circuit feature definition using one-time-programmable (otp) memory |
| 06/11/2009 | US20090146686 Configuration Context Switcher with a Latch |
| 06/11/2009 | US20090146684 Circuit for controlling driver of semiconductor memory apparatus and method of controlling the same |
| 06/11/2009 | US20090146682 Data output driving circuit and method for controlling slew rate thereof |
| 06/11/2009 | US20090146681 Method and apparatus for estimating resistance and capacitance of metal interconnects |
| 06/10/2009 | EP2067313A1 Routing facility for a subsea electronics module |
| 06/10/2009 | CN101453208A Output control circuit and output circuit |
| 06/10/2009 | CN101453207A Operational amplifier |
| 06/10/2009 | CN101453206A Circuit for buffering having a coupler |
| 06/10/2009 | CN101453205A Level shifting apparatus, interface driving circuit and image display system |
| 06/09/2009 | US7546408 Method and apparatus for communication within a programmable device using serial transceivers |
| 06/09/2009 | US7546390 Integrated circuit device and signaling method with topographic dependent equalization coefficient |
| 06/09/2009 | US7545933 Decryption circuit, encryption circuit, logic cell, and method of performing a dual-rail logic operation in single-rail logic environment |
| 06/09/2009 | US7545357 Display device having an improved voltage level converter circuit |
| 06/09/2009 | US7545192 Clock stop detector |
| 06/09/2009 | US7545179 Electronic device and method and performing logic functions |
| 06/09/2009 | US7545178 Signal encoder and signal decoder |
| 06/09/2009 | US7545177 Method and apparatus for leakage current reduction |
| 06/09/2009 | US7545176 Energy-saving circuit and method using charge equalization across complementary nodes |
| 06/09/2009 | US7545175 Slew rate controlled digital output buffer without resistors |
| 06/09/2009 | US7545174 Level shift circuit and display device having the same |
| 06/09/2009 | US7545173 Level shift delay equalization circuit and methodology |
| 06/09/2009 | US7545172 Voltage converter apparatus |
| 06/09/2009 | US7545171 Input/output device with fixed value during sleep mode or at a time of supplying initial voltage to system |
| 06/09/2009 | US7545170 Source driver and level shifting method thereof |
| 06/09/2009 | US7545169 FPGA architecture having two-level cluster input interconnect scheme without bandwidth limitation |
| 06/09/2009 | US7545168 Clock tree network in a field programmable gate array |
| 06/09/2009 | US7545167 Configurable IC with interconnect circuits that also perform storage operations |
| 06/09/2009 | US7545166 Field-programmable gate array low voltage differential signaling driver utilizing two complimentary output buffers |
| 06/09/2009 | US7545165 System architectures for and methods of scheduling on-chip and across-chip noise events in an integrated circuit |
| 06/09/2009 | US7545164 Output driver for controlling impedance and intensity of pre-emphasis driver using mode register set |
| 06/09/2009 | US7545013 Reconfigurable logic circuit using a transistor having spin-dependent transfer characteristics |
| 06/04/2009 | WO2009069174A1 Embedded device and control method |
| 06/04/2009 | US20090144485 Process for automatic dynamic reloading of data flow processors (dfps) and units with two- or three-dimensional programmable cell architectures (fpgas, dpgas, and the like) |
| 06/04/2009 | US20090140772 Architecture for vbus pulsing in udsm processes |
| 06/04/2009 | US20090140771 Current-controlled CMOS circuits with inductive broadbanding |
| 06/04/2009 | US20090140770 Input/output circuit |
| 06/04/2009 | US20090140769 System-in-package |
| 06/04/2009 | US20090140768 Low-noise PECL output driver |
| 06/04/2009 | US20090140767 Universal circuit for secure function evaluation |
| 06/04/2009 | US20090140766 Signal transmission circuit and characteristic adjustment method thereof, memory module, and manufacturing method of circuit board |
| 06/04/2009 | US20090140764 Latch Circuit |
| 06/04/2009 | DE10136798B4 Eingangsschnittstellenschaltung für eine integrierte Halbleiterschaltungsvorrichtung Input interface circuit for a semiconductor integrated circuit device |
| 06/03/2009 | EP2066033A2 Output driver and method of operation thereof |
| 06/03/2009 | EP2064811A1 Circuit and methodology for high-speed, low-power level shifting |
| 06/03/2009 | EP1293077B1 A data transfer and management system |
| 06/03/2009 | CN201251657Y High-brightness displayer |
| 06/03/2009 | CN101447787A Scene programmable gate array |
| 06/03/2009 | CN101447786A Buffer cell circuit for resisting single-particle transient state |
| 06/03/2009 | CN101447785A Differential drive circuit and communication device |
| 06/03/2009 | CN101447784A Voltage level generating device |
| 06/03/2009 | CN100495923C Level shift circuit and semiconductor integrated circuit having the same |
| 06/03/2009 | CN100495922C P-domino output latch with accelerated evaluate path and method for evaluating |
| 06/02/2009 | US7543307 Interface method and device having interface for circuit comprising logical operation element |
| 06/02/2009 | US7543283 Flexible instruction processor systems and methods |
| 06/02/2009 | US7542532 Data transmission device and input/output interface circuit |
| 06/02/2009 | US7541842 Nanotube-based switching elements and logic circuits |
| 06/02/2009 | US7541841 Semiconductor integrated circuit |
| 06/02/2009 | US7541840 Buffer circuit having electrostatic discharge protection |
| 06/02/2009 | US7541839 Semiconductor device having a pseudo power supply wiring |