H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/2009
12/01/2009	US7627070 Method of detecting the relative positioning of two signals and corresponding device
12/01/2009	US7626861 Employing unused configuration memory cells as scratchpad memory
12/01/2009	US7626437 Circuit assembly for converting a differential input clock signal pair into a single-ended output clock signal
12/01/2009	US7626425 High performance clock-powered logic
12/01/2009	US7626424 Wireline transmission circuit
12/01/2009	US7626423 Slew rate control for output signals
12/01/2009	US7626422 Output driver and method thereof
12/01/2009	US7626421 Interface circuit and electronic device
12/01/2009	US7626420 Method, apparatus, and system for synchronously resetting logic circuits
12/01/2009	US7626419 Via programmable gate array with offset bit lines
12/01/2009	US7626418 Configurable interface
12/01/2009	US7626417 On-die-termination control circuit and method
12/01/2009	US7626416 Method and apparatus for high resolution ZQ calibration
12/01/2009	US7626415 Method and apparatus for configuring an integrated circuit
12/01/2009	US7626272 Via configurable architecture for customization of analog circuitry in a semiconductor device
12/01/2009	CA2473031C A crossbar device with reduced parasitic capacitive loading and usage of crossbar devices in reconfigurable circuits
11/2009
11/26/2009	US20090292937 Programmable system on a chip
11/26/2009	US20090290434 Dual function data register
11/26/2009	US20090289696 Apparatus and Methods for Adjusting Performance of Integrated Circuits
11/26/2009	US20090289663 Circuit for comparing two n-digit binary data words
11/26/2009	US20090289662 Bridge design for sd and mmc data buses
11/26/2009	US20090289661 Integrated Circuit With Crosslinked Interconnect Networks
11/26/2009	US20090289660 Interconnection and input/output resources for programmable logic integrated circuit devices
11/26/2009	US20090289657 Systems and methods for providing defect-tolerant logic devices
11/26/2009	DE10015260B4 Reversible adiabatische Logikschaltung und eine entsprechende Schaltung umfassende reversible adiabatische Logikvorrichtung mit Pipelinestruktur Reversible adiabatic logic circuit and a corresponding circuit comprising reversible adiabatic logic device with pipeline structure
11/25/2009	CN201352307Y Digital I/O signal photoelectric isolation/drive circuit board
11/25/2009	CN101588179A Current steering digital-to-analog converter
11/25/2009	CN101588178A Self-biased phase-locked loop
11/25/2009	CN101588175A FPGA array processing board
11/25/2009	CN101588174A Driving circuit, integrated circuit and related electronic device
11/25/2009	CN101588173A Clock and data energy-removing circuit located in SR (Shift Register) and regulator structure
11/25/2009	CN101588172A Reference buffer circuit
11/25/2009	CN101588171A Digital control interface device compatible with three-wire and four-wire SPI working forms simultaneously
11/25/2009	CN101588170A Semiconductor integrated circuit and parameter correction method
11/25/2009	CN101588169A Output buffer circuit and integrated circuit
11/25/2009	CN101588168A Intelligent switch for battery protection
11/25/2009	CN101588014A Narrow pulse high-current semiconductor laser device driving circuit
11/25/2009	CN101587688A Power sequence control circuit, grid driver and liquid crystal display panel applied by power sequence control circuit
11/25/2009	CN101587497A Embedded service function data acquisition unit of numerical control system
11/25/2009	CN100563105C Circuit arrangement for the operation of a switching transistor
11/24/2009	US7624365 Semiconductor integrated device and apparatus for designing the same
11/24/2009	US7623109 Display device
11/24/2009	US7622958 Semiconductor device including current-driven differential driver and method of controlling current-driven differential driver
11/24/2009	US7622957 Pseudo-differential output driver with high immunity to noise and jitter
11/24/2009	US7622955 Power savings with a level-shifting boundary isolation flip-flop (LSIFF) and a clock controlled data retention scheme
11/24/2009	US7622954 Level shifter with memory interfacing two supply domains
11/24/2009	US7622953 Test circuit, selector, and semiconductor integrated circuit
11/24/2009	US7622952 Periphery clock signal distribution circuitry for structured ASIC devices
11/24/2009	US7622951 Via programmable gate array with offset direct connections
11/24/2009	US7622949 Transferring data in a parallel processing environment
11/24/2009	US7622948 Parallel configuration of programmable devices
11/24/2009	US7622947 Redundant circuit presents connections on specified I/O ports
11/24/2009	US7622946 Design structure for an automatic driver/transmission line/receiver impedance matching circuitry
11/24/2009	US7622945 Mix mode driver for traces of different lengths
11/24/2009	US7622944 Method to reduce power in active shield circuits that use complementary traces
11/19/2009	WO2009140585A2 Inductance enhanced rotary traveling wave oscillator circuit and method
11/19/2009	WO2009139768A1 Three dimensional programmable devices
11/19/2009	WO2009139057A1 Method of controlling output current of driver, output current controller for driver, and electronic equipment
11/19/2009	WO2009138739A2 Source controlled sram
11/19/2009	WO2009138616A1 Magnetic device for performing a "logic function"
11/19/2009	WO2009138615A1 Magnetic device for performing a "logic function"
11/19/2009	US20090284283 Ratio asymmetric inverters, and apparatus including one or more ratio asymmetric inverters
11/19/2009	US20090284282 Level shifter
11/19/2009	US20090284279 Integrated Circuit Having Inverse Bit Storage Test
11/18/2009	EP2119011A1 Integrated circuit fuse array
11/18/2009	EP2119010A1 Integrated circuits
11/18/2009	CN201349208Y FPGA multi-mode configuration circuit
11/18/2009	CN101582693A Frequency detection circuit and method of clock data restorer
11/18/2009	CN101582688A Dynamic configuration circuit with FPGA loading mode
11/18/2009	CN101582687A Temperature compensating circuit
11/18/2009	CN101582686A Power level shifter, liquid crystal display device and charge sharing method
11/18/2009	CN101582685A High-speed bidirectional clock tree circuit applied to ultrahigh-speed analog-to-digital converter
11/18/2009	CN101582681A Power amplifying circuit for eliminating turn-off noise
11/18/2009	CN101581948A Reference voltage generating circuit
11/18/2009	CN101581938A Water-level control circuit
11/18/2009	CN100561874C A bipolar return-to-zero signal generation circuit
11/18/2009	CN100561873C Level shifter
11/18/2009	CN100561872C Level conversion circuit
11/18/2009	CN100561871C Level switching circuit
11/18/2009	CN100561870C Narrow pulse pull-down current type level displacement circuit
11/18/2009	CN100561869C Level switching circuit
11/18/2009	CN100561589C Semiconductor memory chip with on-chip termination function
11/17/2009	US7620956 Portable memory storage devices with application layers
11/17/2009	US7620926 Methods and structures for flexible power management in integrated circuits
11/17/2009	US7620677 4:2 Carry save adder and 4:2 carry save adding method
11/17/2009	US7619459 High speed voltage translator circuit
11/17/2009	US7619448 Replica bias circuit for high speed low voltage common mode driver
11/17/2009	US7619445 Differential amplifier, digital-to-analog converter and display apparatus
11/17/2009	US7619444 Circuit technique to prevent device overstress
11/17/2009	US7619443 Programmable logic device architectures and methods for implementing logic in those architectures
11/17/2009	US7619442 Versatile bus interface macro for dynamically reconfigurable designs
11/17/2009	US7619441 Apparatus for interconnecting stacked dice on a programmable integrated circuit
11/17/2009	US7619440 Circuit having logic state retention during power-down and method therefor
11/17/2009	US7619438 Methods of enabling the use of a defective programmable device
11/12/2009	WO2009137601A1 Method and apparatus for propagation delay and emi control
11/12/2009	WO2009136875A1 Synchronous sequential logic device using double triggered flip-flops and method for skewed triggering such state storing registers
11/12/2009	US20090282306 Error detection on programmable logic resources
11/12/2009	US20090282213 Semiconductor integrated circuit
11/12/2009	US20090279346 Fault tolerant asynchronous circuits
11/12/2009	US20090278570 Circuit Configurations Having Four Terminal JFET Devices

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