Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
12/2008
12/04/2008US20080296727 Programmable poly fuse
12/04/2008US20080296722 Junction barrier schottky diode
12/04/2008US20080296721 Junction Barrier Schottky Diode with Dual Silicides and Method of Manufacture
12/04/2008US20080296711 Magnetoelectronic device having enhanced permeability dielectric and method of manufacture
12/04/2008US20080296709 Chip assembly
12/04/2008US20080296707 Semiconductor transistors with expanded top portions of gates
12/04/2008US20080296706 Cobalt disilicide structure
12/04/2008US20080296705 Gate and manufacturing method of gate material
12/04/2008US20080296704 Semiconductor device and manufacturing method thereof
12/04/2008US20080296703 Method for Producing a Field-Effect Transistor, Field-Effect Transistor and Integrated Circuit Arrangement
12/04/2008US20080296702 Integrated circuit structures with multiple FinFETs
12/04/2008US20080296698 Method for suppressing layout sensitivity of threshold voltage in a transistor array
12/04/2008US20080296695 Semiconductor device and method of fabricating the same
12/04/2008US20080296692 Technique for strain engineering in silicon-based transistors by using implantation techniques for forming a strain-inducing layer under the channel region
12/04/2008US20080296691 Layout methods of integrated circuits having unit MOS devices
12/04/2008US20080296689 Nanotube dual gate transistor and method of operating the same
12/04/2008US20080296687 Field-effect transistor (fet) with embedded diode
12/04/2008US20080296683 Carbon nanotube having improved conductivity, process of preparing the same, and electrode comprising the carbon nanotube
12/04/2008US20080296682 Mos structures with remote contacts and methods for fabricating the same
12/04/2008US20080296681 Contact structure for finfet device
12/04/2008US20080296680 Method of making an integrated circuit including doping a fin
12/04/2008US20080296679 Lateral high-voltage transistor with vertically-extended voltage-equalized drift region
12/04/2008US20080296678 Method for fabricating high voltage drift in semiconductor device
12/04/2008US20080296677 Semiconductor device and method of manufacturing the same and data processing system
12/04/2008US20080296676 SOI FET With Source-Side Body Doping
12/04/2008US20080296674 Transistor, integrated circuit and method of forming an integrated circuit
12/04/2008US20080296673 Double gate manufactured with locos techniques
12/04/2008US20080296672 Transistor device and method for manufacturing the same
12/04/2008US20080296671 Semiconductor memory device, manufacturing method thereof, and data processing system
12/04/2008US20080296669 System and method for making a ldmos device with electrostatic discharge protection
12/04/2008US20080296668 Semiconductor device and method of manufacturing a semiconductor device
12/04/2008US20080296667 Semiconductor device and manufacturing method thereof
12/04/2008US20080296665 Mask for manufacturing tft, tft, and manufacturing thereof
12/04/2008US20080296664 Integration of non-volatile charge trap memory devices and logic cmos devices
12/04/2008US20080296663 Semiconductor device and method of manufacturing the same
12/04/2008US20080296662 Discrete Trap Memory (DTM) Mediated by Fullerenes
12/04/2008US20080296661 Integration of non-volatile charge trap memory devices and logic cmos devices
12/04/2008US20080296660 Low resistivity conductive structures, devices and systems including same, and methods forming same
12/04/2008US20080296659 Nand Flash Memory Array Having Pillar Structure and Fabricating Method of the Same
12/04/2008US20080296658 Process for manufacturing a memory device integrated on a semiconductor substrate and comprising nanocristal memory cells and cmos transistors
12/04/2008US20080296657 Non-Volatile Memory Devices and Methods of Manufacturing Non-Volatile Memory Devices
12/04/2008US20080296656 Semiconductor device
12/04/2008US20080296655 Multi-time programmable memory and method of manufacturing the same
12/04/2008US20080296654 Non-volatile memory device and method for fabricating the same
12/04/2008US20080296652 Split gate flash memory cell with ballistic injection
12/04/2008US20080296651 Semiconductor device
12/04/2008US20080296650 High-k dielectrics with gold nano-particles
12/04/2008US20080296649 Semiconductor device employing buried insulating layer and method of fabricating the same
12/04/2008US20080296636 Devices and integrated circuits including lateral floating capacitively coupled structures
12/04/2008US20080296635 Semiconductor device with strain
12/04/2008US20080296634 Structure and method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
12/04/2008US20080296632 Stress-Enhanced Performance Of A FinFet Using Surface/Channel Orientations And Strained Capping Layers
12/04/2008US20080296631 Metal-oxide-semiconductor transistor and method of forming the same
12/04/2008US20080296627 Nitride semiconductor device and method of manufacturing the same
12/04/2008US20080296626 Nitride substrates, thin films, heterostructures and devices for enhanced performance, and methods of making the same
12/04/2008US20080296625 Gallium nitride-on-silicon multilayered interface
12/04/2008US20080296624 Semiconductor device and manufacturing method thereof
12/04/2008US20080296623 Bipolar transistor and method for making same
12/04/2008US20080296622 BURIED CHANNEL MOSFET USING III-V COMPOUND SEMICONDUCTORS AND HIGH k GATE DIELECTRICS
12/04/2008US20080296621 III-nitride heterojunction device
12/04/2008US20080296620 Electronic device including a semiconductor fin and a process for forming the electronic device
12/04/2008US20080296619 Adhesive bonding with low temperature grown amorphous or polycrystalline compound semiconductors
12/04/2008US20080296618 P-GaN/AlGaN/AlN/GaN ENHANCEMENT-MODE FIELD EFFECT TRANSISTOR
12/04/2008US20080296617 METHOD USING LOW TEMPERATURE WAFER BONDING TO FABRICATE TRANSISTORS WITH HETEROJUNCTIONS OF Si(Ge) TO III-N MATERIALS
12/04/2008US20080296616 Gallium nitride-on-silicon nanoscale patterned interface
12/04/2008US20080296615 Fabrication of strained heterojunction structures
12/04/2008US20080296614 Mis-Type Field-Effect Transistor
12/04/2008US20080296612 Method of producing a vertically inhomogeneous platinum or gold distribution in a semiconductor substrate and in a semiconductor device
12/04/2008US20080296611 Semiconductor device and method for manufacturing same
12/04/2008US20080296588 Semiconductor substrate with electromagnetic-wave-scribed nicks, semiconductor light-emitting device with such semiconductor substrate and manufacture thereof
12/04/2008US20080296587 Silicon carbide semiconductor device having junction barrier schottky diode
12/04/2008US20080296586 Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof
12/04/2008US20080296585 GROWTH METHOD OF GaN CRYSTAL, AND GaN CRYSTAL SUBSTRATE
12/04/2008US20080296584 III-V Nitride Semiconductor Layer-Bonded Substrate and Semiconductor Device
12/04/2008US20080296583 Display Device And Manufacturing Method of The Same
12/04/2008US20080296582 Tft-lcd array substrate
12/04/2008US20080296581 Pixel structure and method for forming the same
12/04/2008US20080296580 Silicon oxide film, production method therefor and semiconductor device having gate insulation film using the same
12/04/2008US20080296579 Nanosilicon semiconductor substrate manufacturing method and semiconductor circuit device using nanosilicon semiconductor substrate manufactured by the method
12/04/2008US20080296578 Wiring Material and a Semiconductor Device Having a Wiring Using the Material, and the Manufacturing Method Thereof
12/04/2008US20080296576 Display Device
12/04/2008US20080296575 Thin film transistor, array substrate and method for manufacturing the same
12/04/2008US20080296573 Solid-state element and solid-state element device
12/04/2008US20080296572 Optical semiconductor device with sealing spacer
12/04/2008US20080296569 Compound semiconductor material and method for forming an active layer of a thin film transistor device
12/04/2008US20080296568 Thin film transistors and methods of manufacturing the same
12/04/2008US20080296567 Method of making thin film transistors comprising zinc-oxide-based semiconductor materials
12/04/2008US20080296566 Making organic thin film transistor substrates for display devices
12/04/2008US20080296565 Method of fabricating polycrystalline silicon layer, tft fabricated using the same, method of fabricating tft, and organic light emitting diode display device having the same
12/04/2008US20080296559 Method for Fabricating a Nanoelement Field Effect Transistor with Surrounded Gate Structure
12/04/2008US20080296558 Method of Synthesizing Y-Junction Single-Walled Carbon Nanotubes and Products Formed Thereby
12/04/2008US20080296557 Semiconductor Power Switch and Method for Producing a Semiconductor Power Switch
12/04/2008US20080296556 Method For Dopant Calibration of Delta Doped Multilayered Structure
12/04/2008US20080296555 Lamp with controllable spectrum
12/04/2008DE19964494B4 Verfahren zur Herstellung ferroelektrischer Speichereinrichtungen Process for the preparation of ferroelectric memory devices
12/04/2008DE19857852B4 Halbleitervorrichtung und Verfahren zu deren Herstellung Semiconductor device and process for their preparation
12/04/2008DE19533754B4 Isolierschicht-Vorrichtung (IG-Vorrichtung) mit einem Aufbau mit einer Source mit engem Bandabstand, und Verfahren zu deren Herstellung Insulating means (IG) device having a structure having a source with a narrow band gap, and processes for their preparation
12/04/2008DE10330490B4 Integrierte MIM-Kondensatorstruktur Integrated MIM capacitor structure
12/04/2008DE10260859B4 Strukturkörper mit einem porösen Bereich und dessen Verwendung sowie Verfahren zur Einstellung der Wärmeleitfähigkeit eines porösen Bereiches Structure body having a porous region, and its use as well as methods for setting the thermal conductivity of a porous portion
12/04/2008DE10209069B4 Spannungsbegrenzungselement für hochintegrierte Schaltungen Voltage limiting element for highly integrated circuits
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