Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/2004
06/24/2004US20040121592 Method for fabricating metal silicide
06/24/2004US20040121591 Fabrication method of semiconductor integrated circuit device
06/24/2004US20040121573 Method for forming enhanced areal density split gate field effect transistor device array
06/24/2004US20040121572 Trench MIS device having implanted drain-drift region and thick bottom oxide and process for manufacturing the same
06/24/2004US20040121569 Method for minimizing the vapor deposition of tungsten oxide during the selective side wall oxidation of tungsten-silicon gates
06/24/2004US20040121567 Doping method and semiconductor device fabricated using the method
06/24/2004US20040121566 Method to produce low leakage high K materials in thin film form
06/24/2004US20040121563 Method for fabricating encapsulated semiconductor components having conductive vias
06/24/2004US20040121561 Method of forming electronic dies wherein each die has a layer of solid diamond
06/24/2004US20040121556 Thinning techniques for wafer-to-wafer vertical stacks
06/24/2004US20040121554 Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium
06/24/2004US20040121550 Method for creating barriers to metal contamination in silicon oxides
06/24/2004US20040121549 Self-aligned planar double-gate process by amorphization
06/24/2004US20040121546 Vertical transistor and method of manufacturing thereof
06/24/2004US20040121544 High-k tunneling dielectric for read only memory device and fabrication method thereof
06/24/2004US20040121542 SiN ROM AND METHOD OF FABRICATING THE SAME
06/24/2004US20040121541 Integrating n-type and p-type metal gate transistors
06/24/2004US20040121540 Stacked gate flash memory device and method of fabricating the same
06/24/2004US20040121539 Non-volatile semiconductor memory device and manufacturing method for the same
06/24/2004US20040121538 Flash memory device and a fabrication process thereof, method of forming a dielectric film
06/24/2004US20040121534 Novel layer of high-k inter-poly dielectric
06/24/2004US20040121531 Method of removing features using an improved removal process in the fabrication of a semiconductor device
06/24/2004US20040121529 Method of forming a buffer dielectric layer in a semiconductor device and a method of manufacturing a thin film transistor using the same
06/24/2004US20040121526 Fabrication process of a semiconductor integrated circuit device
06/24/2004US20040121524 Apparatus and method for controlling diffusion
06/24/2004US20040121523 Matrix substrate, electronic apparatus, electro-optic apparatus, and electronic unit
06/24/2004US20040121522 Metal redistribution layer traces in an integrated circuit die.
06/24/2004US20040121504 Process for the fabrication of an inertial sensor with failure threshold
06/24/2004US20040121500 Optical device and method of manufacture thereof
06/24/2004US20040121354 System and method for detecting biological and chemical material
06/24/2004US20040121166 Semiconductor device and manufacturing method thereof
06/24/2004US20040120198 Method for providing bitline contacts in a memory cell array and a memory cell array having bitline contacts
06/24/2004US20040120188 Novel two-transistor flash cell for large endurance application
06/24/2004US20040120183 Piezoelectric array with strain dependent conducting elements and method therefor
06/24/2004US20040120085 Semiconductor device with surge protection circuit
06/24/2004US20040119898 Vertical alignment mode liquid crystal display
06/24/2004US20040119865 Solid image capturing element for power saving at output section and manufacturing method for the same
06/24/2004US20040119399 Organic electroluminescence display and method of fabricating the same
06/24/2004US20040119167 Semiconductor device having an active region whose width varies
06/24/2004US20040119165 Multilayered integrated circuit with extraneous conductive traces
06/24/2004US20040119154 Flip chip fet device
06/24/2004US20040119139 Semiconductor device having a redundancy function
06/24/2004US20040119136 Bipolar transistor having a majority-carrier accumulation layer as subcollector
06/24/2004US20040119133 Semiconductor device
06/24/2004US20040119132 Dielectric separation type semiconductor device and method of manufacturing the same
06/24/2004US20040119130 Lateral PIN diode and method for processing same
06/24/2004US20040119128 Integration system via metal oxide conversion
06/24/2004US20040119127 Active electronic device and electronic apparatus
06/24/2004US20040119124 Semiconductor device and manufacturing method for silicon oxynitride film
06/24/2004US20040119123 Gas insulated gate field effect transistor
06/24/2004US20040119122 Semiconductor device with localized charge storage dielectric and method of making same
06/24/2004US20040119120 MOSFET for an open-drain circuit and semiconductor integrated circuit device employing it
06/24/2004US20040119118 Testable electrostatic discharge protection circuits
06/24/2004US20040119117 Buried-gate-type semiconductor device
06/24/2004US20040119116 Array of pull-up transistors for high voltage output circuit
06/24/2004US20040119115 Nitride-encapsulated FET (NNCFET)
06/24/2004US20040119113 Programmable memory transistor
06/24/2004US20040119112 Multi-level memory cell with lateral floating spacers
06/24/2004US20040119111 Non-volatile semiconductor memory device and manufacturing method for the same
06/24/2004US20040119110 Non-volatile memory cells having floating gate and method of forming the same
06/24/2004US20040119109 Non-volatile memory device having improved programming and erasing characteristics and method of fabricating the same
06/24/2004US20040119108 Silicon nitride read-only-mrmory and fabricating method thereof
06/24/2004US20040119107 Fabrication method and structure of semiconductor non-volatile memory device
06/24/2004US20040119106 Structure with programming injector in split gate flash
06/24/2004US20040119103 Mosgated device with accumulated channel region and schottky contact
06/24/2004US20040119102 Self-aligned isolation double-gate FET
06/24/2004US20040119100 Dense dual-plane devices
06/24/2004US20040119092 Semiconductor device
06/24/2004US20040119091 Semiconductor device and method of manufacturing the same
06/24/2004US20040119090 GaAs semiconductor device
06/24/2004US20040119088 surface roughness of the substrate is defined as a ratio between a substantial area and a projected area; polishing and wet-etching a backside surface of the substrate mechanically with using predetermined abrasive grains
06/24/2004US20040119087 Breakdown voltage for power devices
06/24/2004US20040119076 Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors and methods of fabricating vertical JFET limited silicon carbide metal- oxide semiconductor field effect transistors
06/24/2004US20040119075 Electro-optical device, method of manufacturing the same, and electronic apparatus
06/24/2004US20040119074 Thin film transistor liquid crystal display and fabrication method thereof
06/24/2004US20040119072 Method of forming a thin film transistor
06/24/2004US20040119064 Methods of forming three-dimensional nanodot arrays in a matrix
06/24/2004US20040119063 Gallium nitride-based devices and manufacturing process
06/24/2004US20040119062 Self-organized nanometer interface structure and its applications in electronic and opto-electronic devices
06/24/2004US20040119049 or semiconductors in electrooptical, electronic and electroluminescent devices
06/24/2004US20040118814 Etching solution for multiple layer of copper and molybdenum and etching method using the same
06/24/2004US20040118429 Apparatus and method for cleaning a glass substrate before photoresist coating
06/24/2004DE10255359A1 Transistor mit Füllbereichen im Source- und/oder Draingebiet Transistor with area fills in source and / or drain region
06/24/2004DE10247007B3 Semiconductor device used as a MOSFET comprises a substrate, an insulating layer arranged on the substrate, and a first transistor and a second transistor
06/24/2004DE10164149B4 Verfahren zum Programmieren einer nicht flüchtigen Halbleiterspeichervorrichtung A method for programming a nonvolatile semiconductor memory device
06/23/2004EP1432048A1 MATRIX TYPE PIEZOELECTRIC/ELECTROSTRICTIVE DEVICE AND ITS MANUFACTURING METHOD
06/23/2004EP1432042A2 Thin film transistor with LDD/offset structure
06/23/2004EP1432041A2 Lateral-current-flow bipolar transistor with high emitter perimeter/area ratio
06/23/2004EP1432040A2 Semiconductor memory device and its production process
06/23/2004EP1432039A2 Programmable memory transistor
06/23/2004EP1432037A2 Integrated device with Schottky diode and with MOS transistor and related manufacturing process
06/23/2004EP1432036A2 Semiconductor device and sustaining circuit
06/23/2004EP1432032A2 Semiconductor chip stack and method for manufacturing the same
06/23/2004EP1432030A2 Semiconductor device
06/23/2004EP1432015A2 Semiconductor and semiconductor substrate, method of manufacturing the same, and semiconductor device
06/23/2004EP1431764A2 Acceleration sensor
06/23/2004EP1431426A2 Substrate for epitaxial growth
06/23/2004EP1430552A1 Molecular memory and method for making same
06/23/2004EP1430540A1 Flash memory cell with entrenched floating gate and method for operating said flash memory cell
06/23/2004EP1430539A1 Edge termination in a trench-gate mosfet