Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2005
05/05/2005US20050095796 Technique for forming a transistor having raised drain and source regions with a reduced number of process steps
05/05/2005US20050095795 MOS transistors having recesses with elevated source/drain regions and methods of fabricating such transistors
05/05/2005US20050095794 Method of fabricating recess channel array transistor
05/05/2005US20050095793 Transistor of semiconductor device and method for manufacturing the same
05/05/2005US20050095790 Systems and methods for integration of heterogeneous circuit devices
05/05/2005US20050095789 Trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface
05/05/2005US20050095788 Method for fabricating a semiconductor structure with an encapsulation of a filling which is used for filling trenches
05/05/2005US20050095787 Structure and method for formation of a bipolar resistor
05/05/2005US20050095786 Non-volatile memory and method of manufacturing floating gate
05/05/2005US20050095785 Method of manufacturing split gate type nonvolatile memory device
05/05/2005US20050095784 Method for manufacturing flash memory device
05/05/2005US20050095775 Memory device having a transistor and one resistant element as a storing means and method for driving the memory device
05/05/2005US20050095772 Method of fabricating semiconductor device
05/05/2005US20050095766 Method of forming a gate structure using a dual step polysilicon deposition procedure
05/05/2005US20050095765 Semiconductor device and method of fabricating the same
05/05/2005US20050095764 Triple-gate mosfet transistor and methods for fabricating the same
05/05/2005US20050095763 Method of forming an NMOS transistor and structure thereof
05/05/2005US20050095761 Method of manufacturing a semiconductor device
05/05/2005US20050095760 Method of manufacturing a semiconductor device
05/05/2005US20050095759 Method of manufacturing thin film transistor array substrate
05/05/2005US20050095758 CMOS thin film transistor
05/05/2005US20050095757 Thin film transistor substrate and fabricating method thereof
05/05/2005US20050095755 Manufacturing method of thin film device substrate
05/05/2005US20050095754 Method for fabricating liquid crystal display device
05/05/2005US20050095753 Thin film transistor with multiple gates using metal induced lateral crystallization and method of fabricating the same
05/05/2005US20050095735 Forming thin film switches on substrate support; accurate inspection; pixel electrodes; drains
05/05/2005US20050095409 Method for manufacturing substrate conjugate, substrate conjugate, method for manufacturing electro-optical apparatus, and electro optical apparatus
05/05/2005US20050095356 Semiconductor with high accuracy, aspect ratio; forming wiring using ink ket process; photocatalytic titanium dioxide overcoated substrate
05/05/2005US20050095004 On chip CMOS optical element
05/05/2005US20050094457 Ferroelectric memory and method of operating same
05/05/2005US20050094453 Merged MOS-bipolar capacitor memory cell
05/05/2005US20050094431 Nonvolatile semiconductor memory
05/05/2005US20050094079 Thin film transistor substrate using a horizontal electric field type liquid crystal display device and fabricating method thereof
05/05/2005US20050094078 In plane switching mode liquid crystal display device and fabrication method thereof
05/05/2005US20050094077 In plane switching mode liquid crystal display device and fabrication method thereof
05/05/2005US20050094071 Display device and method of manufacturing the same
05/05/2005US20050094067 Transflective type LCD and method for manufacturing the same
05/05/2005US20050094046 Liquid crystal display device and method for fabricating the same
05/05/2005US20050093852 Electrooptical device and method of fabricating the same
05/05/2005US20050093174 Reduced footprint packaged microelectronic components and methods for manufacturing such microelectronic components
05/05/2005US20050093168 Semiconductor device and method of manufacturing the same
05/05/2005US20050093162 Adhesion layer of 11-trichlorosilylundecyl thioacetate coupled to a copper layer formed over a dielectric layer via the thioacetate group and a silicon dioxide layer via the trichlorosilyl group
05/05/2005US20050093159 Stress-relief layer for semiconductor applications
05/05/2005US20050093158 Eliminates overlying exposure mask of photoresist
05/05/2005US20050093157 Electronic device and method of fabricating the same
05/05/2005US20050093154 Multiple gate semiconductor device and method for forming same
05/05/2005US20050093147 Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same
05/05/2005US20050093131 Semiconductor device having metal plates and semiconductor chip
05/05/2005US20050093129 Semiconductor device and manufacturing method thereof
05/05/2005US20050093109 Nitrogen implementation to minimize device variation
05/05/2005US20050093108 Insulating layer having decreased dielectric constant and increased hardness
05/05/2005US20050093107 Thin dielectric layers on substrates, and methods of making the same
05/05/2005US20050093106 Fluid ejection device and method of fabricating the same
05/05/2005US20050093105 Semiconductor-on-insulator chip with<100>-oriented transistors
05/05/2005US20050093098 Semiconductor device and method for fabricating the same
05/05/2005US20050093097 Enhanced substrate contact for a semiconductor device
05/05/2005US20050093096 Bipolar transistor for avoiding thermal runaway
05/05/2005US20050093085 Semiconductor device having silicon oxide film
05/05/2005US20050093084 Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same
05/05/2005US20050093083 Semiconductor device and process of fabricating same
05/05/2005US20050093082 Fin field effect transistors having capping insulation layers and methods for forming the same
05/05/2005US20050093080 Semiconductor device and method of manufacturing the same
05/05/2005US20050093079 Erasable and programmable read only memory (EPROM) device and method of manufacturing a semiconductor device having the same
05/05/2005US20050093076 METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES
05/05/2005US20050093075 Advanced technique for forming a transistor having raised drain and source regions
05/05/2005US20050093074 Method of fabricating a finfet
05/05/2005US20050093073 Low voltage NMOS-based electrostatic discharge lamp
05/05/2005US20050093070 Fully silicided NMOS device for electrostatic discharge protection
05/05/2005US20050093069 Lateral high-voltage junction device
05/05/2005US20050093068 Method for manufacturing MOS transistor and semiconductor device employing MOS transistor made using the same
05/05/2005US20050093067 Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
05/05/2005US20050093065 Method for fabricating thin film transistor with multiple gates using metal induced lateral crystallization
05/05/2005US20050093064 Semiconductor integrated circuit device
05/05/2005US20050093062 SOI component with increased dielectric strength and improved heat dissipation
05/05/2005US20050093061 Semiconductor device having a stacked gate insulation film and a gate electrode and manufacturing method thereof
05/05/2005US20050093060 A structure of a lateral diffusion mos transistor in widespread use as a power control device
05/05/2005US20050093059 Structure and method to improve channel mobility by gate electrode stress modification
05/05/2005US20050093058 Sonos device and methods of manufacturing the same
05/05/2005US20050093057 Common spacer dual gate memory cell and method for forming a nonvolatile memory array
05/05/2005US20050093056 Nonvolatile memory device and method for manufacturing the same
05/05/2005US20050093055 Flash memory and method thereof
05/05/2005US20050093054 Non-volatile memory devices and methods of fabricating the same
05/05/2005US20050093053 Discontinuous dielectric interface for bipolar transistors
05/05/2005US20050093052 Structurally-stabilized capacitors and method of making of same
05/05/2005US20050093049 Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage capacitor
05/05/2005US20050093048 Deep trench capacitor having increased surface area
05/05/2005US20050093047 Semiconductor memory device and method of manufacturing the same
05/05/2005US20050093040 Device and method for inhibiting oxidation of contact plugs in ferroelectric capacitor devices
05/05/2005US20050093037 Method of manufacturing a semiconductor device
05/05/2005US20050093035 Semiconductor device and manufacturing method of semiconductor device
05/05/2005US20050093034 Reducing dopant losses during annealing processes
05/05/2005US20050093033 Field effect transistor and manufacturing method thereof
05/05/2005US20050093032 Transistor having a germanium implant region located therein and a method of manufacture therefor
05/05/2005US20050093031 Devices having large organic semiconductor crystals and methods of making the same
05/05/2005US20050093028 Multiple-gate MOSFET device with lithography independent silicon body thickness and methods for fabricating the same
05/05/2005US20050093027 Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
05/05/2005US20050093025 Method for making nanoscale wires and gaps for switches and transistors
05/05/2005US20050093024 Semiconductor device and method for manufacturing the same
05/05/2005US20050093023 Frequency selective terahertz radiation detector
05/05/2005US20050093021 High mobility heterojunction complementary field effect transistors and methods thereof
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