Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2005
05/18/2005CN1617035A 液晶显示装置 The liquid crystal display device
05/18/2005CN1617034A 液晶显示器 LCD Monitor
05/18/2005CN1617033A Reflective type liquid crystal display device and fabricating method thereof
05/18/2005CN1617032A Photoelectronic device and its producing method and electronic device with said photoelectronic device
05/18/2005CN1202576C Vacuum field effect transistor
05/18/2005CN1202563C Reduction of gate-induced drain leakage in semiconductor devices
05/18/2005CN1202545C Planar electron emitter (PEE), display using it and method for transmitting electron
05/18/2005CN1202291C Method for making gallium nitride crystal
05/17/2005USRE38734 Semiconductor switching apparatus and method of controlling a semiconductor switching element
05/17/2005US6894944 Semiconductor integrated circuit device
05/17/2005US6894932 Dual cell memory device having a top dielectric stack
05/17/2005US6894930 Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND
05/17/2005US6894929 Method of programming semiconductor memory device having memory cells and method of erasing the same
05/17/2005US6894926 Multi-state memory
05/17/2005US6894925 Flash memory cell programming method and system
05/17/2005US6894916 Memory array employing single three-terminal non-volatile storage elements
05/17/2005US6894913 Non-volatile semiconductor memory and method of operating the same
05/17/2005US6894760 Array substrate for liquid crystal display device and manufacturing method thereof
05/17/2005US6894754 Substrate with a flattening film, display substrate, and method of manufacturing the substrates
05/17/2005US6894736 Liquid crystal display having a polymer or spin-on glass as a capacitor dielectric and a method of manufacture
05/17/2005US6894734 Liquid-crystal display device and method for production thereof
05/17/2005US6894432 Light emitting device and production method thereof
05/17/2005US6894397 Plural semiconductor devices in monolithic flip chip
05/17/2005US6894391 Electrode structure on P-type III group nitride semiconductor layer and formation method thereof
05/17/2005US6894369 Semiconductor device having a high-dielectric gate insulation film and fabrication process thereof
05/17/2005US6894367 Vertical bipolar transistor
05/17/2005US6894366 Bipolar junction transistor with a counterdoped collector region
05/17/2005US6894365 Semiconductor device having an integral resistance element
05/17/2005US6894361 Semiconductor device
05/17/2005US6894360 Electrostatic discharge protection of thin-film resonators
05/17/2005US6894358 Process for producing microelectromechanical components and a housed microelectromechanical component
05/17/2005US6894357 Gate stack for high performance sub-micron CMOS devices
05/17/2005US6894352 Single-electron transistor and fabrication method thereof
05/17/2005US6894351 Semiconductor device for electrostatic protection
05/17/2005US6894350 LDMOS transistor capable of attaining high withstand voltage with low on-resistance and having a structure suitable for incorporation with other MOS transistors
05/17/2005US6894349 Lateral DMOS structure with lateral extension structure for reduced charge trapping in gate oxide
05/17/2005US6894348 Semiconductor device
05/17/2005US6894347 Power semiconductor element capable of improving short circuit withstand capability while maintaining low on-voltage and method of fabricating the same
05/17/2005US6894346 Semiconductor device
05/17/2005US6894345 P channel Rad Hard MOSFET with enhancement implant
05/17/2005US6894344 Semiconductor integrated circuit having two switch transistors formed between two diffusion-layer lines
05/17/2005US6894341 Semiconductor device and manufacturing method
05/17/2005US6894340 Non-volatile semiconductor memory cell utilizing poly-edge discharge
05/17/2005US6894339 Flash memory with trench select gate and fabrication process
05/17/2005US6894338 Rare earth metal oxide memory element based on charge storage and method for manufacturing same
05/17/2005US6894337 System and method for forming stacked fin structure using metal-induced-crystallization
05/17/2005US6894336 Vertical access transistor with curved channel
05/17/2005US6894334 Active material zones separated by dielectric and channel barrier; etching using mask; overcoating aperture with tungsten, then aluminum, or alloy thereof
05/17/2005US6894330 Memory configuration and method for reading a state from and storing a state in a ferroelectric transistor
05/17/2005US6894329 High-voltage semiconductor component
05/17/2005US6894328 Self-aligned bipolar transistor having recessed spacers and method for fabricating same
05/17/2005US6894327 Negative differential resistance pull up element
05/17/2005US6894326 High-density finFET integration scheme
05/17/2005US6894325 Fabrication of low resistance, non-alloyed, ohmic contacts to InP using non-stoichiometric InP layers
05/17/2005US6894324 Silicon-on-insulator diodes and ESD protection circuits
05/17/2005US6894323 Group III nitride semiconductor device and its method of manufacture
05/17/2005US6894321 ESD protection circuit with plural thyristors
05/17/2005US6894320 Input protection circuit
05/17/2005US6894319 Semiconductor device
05/17/2005US6894318 Diode having a double implanted guard ring
05/17/2005US6894313 CMOS thin film transistor and display device using the same
05/17/2005US6894311 Active matrix substrate for liquid crystal display utilizing interconnection lines formed from multilayered films that include an aluminum-neodymium alloy layer
05/17/2005US6893987 Simple process for fabricating semiconductor devices
05/17/2005US6893984 Evaporated LaA1O3 films for gate dielectrics
05/17/2005US6893981 Method of manufacturing a semiconductor device by RTA process in nitrogen atmosphere
05/17/2005US6893980 Semiconductor device and manufacturing method therefor
05/17/2005US6893979 Method for improved plasma nitridation of ultra thin gate dielectrics
05/17/2005US6893967 L-shaped spacer incorporating or patterned using amorphous carbon or CVD organic materials
05/17/2005US6893948 Method of reducing polysilicon depletion in a polysilicon gate electrode by depositing polysilicon of varying grain size
05/17/2005US6893947 Advanced RF enhancement-mode FETs with improved gate properties
05/17/2005US6893934 Bipolar transistor device having phosphorous
05/17/2005US6893933 Bipolar transistors with low-resistance emitter contacts
05/17/2005US6893932 Heterojunction bipolar transistor containing at least one silicon carbide layer
05/17/2005US6893929 Method of forming strained silicon MOSFET having improved threshold voltage under the gate ends
05/17/2005US6893928 Semiconductor device and method of manufacturing the same
05/17/2005US6893927 Method for making a semiconductor device with a metal gate electrode
05/17/2005US6893926 Manufacturing method of semiconductor device with protection against electrostatic discharge
05/17/2005US6893924 Dual metal-alloy nitride gate electrodes
05/17/2005US6893923 Reduced mask count process for manufacture of mosgated device
05/17/2005US6893922 Non-volatile memory device and manufacturing method thereof
05/17/2005US6893921 Nonvolatile memories with a floating gate having an upward protrusion
05/17/2005US6893920 Method for forming a protective buffer layer for high temperature oxide processing
05/17/2005US6893917 Structure and fabricating method to make a cell with multi-self-alignment in split gate flash
05/17/2005US6893911 Process integration for integrated circuits
05/17/2005US6893910 One step deposition method for high-k dielectric and metal gate electrode
05/17/2005US6893909 Method of manufacturing metal-oxide-semiconductor transistor
05/17/2005US6893908 Thin film transfer array substrate for liquid crystal display and method for fabricating same
05/17/2005US6893905 Method of forming substantially hillock-free aluminum-containing components
05/17/2005US6893904 Stereolithographic methods of fabricating semiconductor devices having protective layers thereon through which contact pads are exposed
05/17/2005US6893894 Method of manufacturing a compound semiconductor by heating a layered structure including rare earth transition metal
05/17/2005US6893503 Method of manufacturing a semiconductor device
05/17/2005US6892579 Acceleration sensor
05/17/2005US6892578 Acceleration sensor
05/17/2005US6892577 Acceleration sensor formed on surface of semiconductor substrate
05/17/2005CA2324451C Method for fabricating an electrically addressable silicon-on-sapphire light valve
05/12/2005WO2005043669A1 Ferroelectric varactors suitable for capacitive shunt switching
05/12/2005WO2005043639A1 Conductive thin film and thin-film transistor
05/12/2005WO2005043630A1 Organic thin film transistor
05/12/2005WO2005043629A1 Method for producing a vertical field effect transistor
05/12/2005WO2005043627A1 Power surface mount light emitting die package
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