| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 09/21/2005 | CN1220271C Semiconductor device and its making method |
| 09/21/2005 | CN1220270C Semiconductor device and manufacturing method thereof |
| 09/21/2005 | CN1220269C Vertical component with high breakdown voltage |
| 09/21/2005 | CN1220266C Non-volatile semiconductor memory and its producing process |
| 09/21/2005 | CN1220255C Polycrystalline silicon grading method and system and thin film transistor making method and system |
| 09/21/2005 | CN1220251C Semiconductor device and manufacturing method thereof |
| 09/21/2005 | CN1220107C Electrooptical device and manufacturing method for semiconductor device |
| 09/21/2005 | CN1220106C Electrooptical apparatus and electronic equipment |
| 09/20/2005 | US6947330 Electrically erasable charge trap nonvolatile memory cells having erase threshold voltage that is higher than an initial threshold voltage |
| 09/20/2005 | US6947325 Non-volatile semiconductor memory device and controlling method of the same |
| 09/20/2005 | US6947103 Method of making a reflection type liquid crystal display device |
| 09/20/2005 | US6947102 Light sensitive display which senses decreases in light |
| 09/20/2005 | US6947087 Solid-state imaging device with dynamic range control |
| 09/20/2005 | US6946891 Switching circuit device |
| 09/20/2005 | US6946747 Semiconductor device and its manufacturing method |
| 09/20/2005 | US6946731 Layout structure for providing stable power source to a main bridge chip substrate and a motherboard |
| 09/20/2005 | US6946720 Bipolar transistor for an integrated circuit having variable value emitter ballast resistors |
| 09/20/2005 | US6946718 Integrated fuse for multilayered structure |
| 09/20/2005 | US6946717 High voltage semiconductor device |
| 09/20/2005 | US6946712 Magnetic memory device using SOI substrate |
| 09/20/2005 | US6946711 Semiconductor device |
| 09/20/2005 | US6946709 Complementary transistors having different source and drain extension spacing controlled by different spacer sizes |
| 09/20/2005 | US6946708 Semiconductor apparatus with improved ESD withstanding voltage |
| 09/20/2005 | US6946707 Electrostatic discharge input and power clamp circuit for high cutoff frequency technology radio frequency (RF) applications |
| 09/20/2005 | US6946706 LDMOS transistor structure for improving hot carrier reliability |
| 09/20/2005 | US6946705 Lateral short-channel DMOS, method of manufacturing the same, and semiconductor device |
| 09/20/2005 | US6946703 SONOS memory device having side gate stacks and method of manufacturing the same |
| 09/20/2005 | US6946698 MRAM device having low-k inter-metal dielectric |
| 09/20/2005 | US6946697 Synthetic antiferromagnet structures for use in MTJs in MRAM technology |
| 09/20/2005 | US6946696 Self-aligned isolation double-gate FET |
| 09/20/2005 | US6946694 Gate oxide film structure for a solid state image pick-up device |
| 09/20/2005 | US6946693 Electromechanical electron transfer devices |
| 09/20/2005 | US6946691 Field effect transistor |
| 09/20/2005 | US6946690 High holding voltage ESD protection structure and method |
| 09/20/2005 | US6946689 Control TFT for OLED display |
| 09/20/2005 | US6946686 Method of fabricating semiconductor device and semiconductor device |
| 09/20/2005 | US6946685 Light emitting semiconductor method and device |
| 09/20/2005 | US6946683 Opposed terminal structure having a nitride semiconductor element |
| 09/20/2005 | US6946681 Molybdenum or molybdenum-tungsten alloy layer is used for a wiring of a display or a semiconductor display along with other metal or alloy layers; low resistivity |
| 09/20/2005 | US6946676 Organic thin film transistor with polymeric interface |
| 09/20/2005 | US6946675 Microelectronic components and electronic networks comprising DNA |
| 09/20/2005 | US6946596 Tunneling-effect energy converters |
| 09/20/2005 | US6946402 Fabricating method of polycrystalline silicon thin film transistor with improved electrical characteristics |
| 09/20/2005 | US6946395 Devices containing zirconium-platinum-containing materials and methods for preparing such materials and devices |
| 09/20/2005 | US6946377 Multiple-gate MOSFET device with lithography independent silicon body thickness and methods for fabricating the same |
| 09/20/2005 | US6946376 Symmetric device with contacts self aligned to gate |
| 09/20/2005 | US6946374 Methods of manufacturing flash memory semiconductor devices |
| 09/20/2005 | US6946372 Method of manufacturing gallium nitride based semiconductor light emitting device |
| 09/20/2005 | US6946371 Methods of fabricating semiconductor structures having epitaxially grown source and drain elements |
| 09/20/2005 | US6946369 Method for forming, by CVD, nanostructures of semi-conductor material of homogenous and controlled size on dielectric material |
| 09/20/2005 | US6946364 Integrated circuit having a device wafer with a diffused doped backside layer |
| 09/20/2005 | US6946361 Method of peeling off and method of manufacturing semiconductor device |
| 09/20/2005 | US6946355 Method for producing a hetero-bipolar transistor and hetero-bipolar transistor |
| 09/20/2005 | US6946353 Low voltage high performance semiconductor devices and methods |
| 09/20/2005 | US6946351 Method for fabricating a semiconductor device |
| 09/20/2005 | US6946350 Controlled faceting of source/drain regions |
| 09/20/2005 | US6946348 Low voltage high density trench-gated power device with uniformity doped channel and its edge termination technique |
| 09/20/2005 | US6946347 Non-volatile memory structure |
| 09/20/2005 | US6946346 Method for manufacturing a single electron memory device having quantum dots between gate electrode and single electron storage element |
| 09/20/2005 | US6946345 Self-aligned buried strap process using doped HDP oxide |
| 09/20/2005 | US6946342 Semiconductor device and method for manufacturing the same |
| 09/20/2005 | US6946339 Method for creating a stepped structure on a substrate |
| 09/20/2005 | US6946338 Method for manufacturing semiconductor device |
| 09/20/2005 | US6946337 Method of manufacturing semiconductor devices |
| 09/20/2005 | US6946335 Method of manufacturing improved double-diffused metal-oxide-semiconductor device with self-aligned channel |
| 09/20/2005 | US6946333 Active matrix pixel device construction method |
| 09/20/2005 | US6946330 Designing method and manufacturing method for semiconductor display device |
| 09/20/2005 | US6946318 Method of forming GE photodetectors |
| 09/20/2005 | US6946314 Method for microfabricating structures using silicon-on-insulator material |
| 09/20/2005 | US6946310 Display device |
| 09/20/2005 | US6946308 Method of manufacturing III-V group compound semiconductor |
| 09/20/2005 | US6946200 Methods for reducing the curvature in boron-doped silicon micromachined structures |
| 09/20/2005 | US6946052 Separating apparatus and processing method for plate member |
| 09/20/2005 | US6946046 Method and apparatus for separating member |
| 09/15/2005 | WO2005086253A1 Field effect transistor and method of producing the same |
| 09/15/2005 | WO2005086237A2 Ldmos transistor and method of making the same |
| 09/15/2005 | WO2005086231A1 Semiconductor structure |
| 09/15/2005 | WO2005086220A1 Highly reliable, cost effective and thermally enhanced ausn die-attach technology |
| 09/15/2005 | WO2005086215A1 Plasma processing method and computer storing medium |
| 09/15/2005 | WO2005086211A1 Method for fabricating a semiconductor device and apparatus for inspecting a semiconductor |
| 09/15/2005 | WO2005086180A1 Thin-film transistor and thin-film transistor substrate and production methods for them and liquid crystal display unit using these and related device and method, and, sputtering target and transparent conductive film formed by using this and transparent electrode and related device and method |
| 09/15/2005 | WO2005085496A2 Ferroelectric thin film composites with improved top contact adhesion and devices containing the same |
| 09/15/2005 | WO2005084342A2 A semiconductor device having a silicided gate electrode and method of manufacture therefor |
| 09/15/2005 | WO2005084221A2 Self aligned contact structure for trench device |
| 09/15/2005 | WO2005084164A2 Nanotube-based switching elements and logic circuits |
| 09/15/2005 | WO2005045892A3 Confined spacers for double gate transistor semiconductor fabrication process |
| 09/15/2005 | WO2005029568A3 INTERFACIAL OXIDATION PROCESS FOR HIGH-k GATE DIELECTRIC PROCESS INTEGRATION |
| 09/15/2005 | WO2005024907A3 Vertical organic field effect transistor |
| 09/15/2005 | WO2005017974A3 Improved integrated circuit substrate material and method |
| 09/15/2005 | WO2005017967A3 Nanotube device structure and methods of fabrication |
| 09/15/2005 | WO2004107410B1 Self-aligned bipolar transistor having recessed spacers and method for fabricating same |
| 09/15/2005 | WO2004107409B1 Method for fabricating a self-aligned bipolar transistor having increased manufacturabily and related structure |
| 09/15/2005 | WO2004094764A3 Low cost capacitors manufactured from conductive loaded resin-based materials |
| 09/15/2005 | WO2004073035A3 Magnetic memory elements using 360 degree domain walls |
| 09/15/2005 | US20050204212 Data memory system |
| 09/15/2005 | US20050203719 Method for simulating reliability of semiconductor device |
| 09/15/2005 | US20050202686 Method of manufacturing semiconductor device |
| 09/15/2005 | US20050202672 Method for manufacturing tungsten/polysilicon word line structure in vertical dram and device manufactured thereby |
| 09/15/2005 | US20050202663 Method of manufacturing semiconductor device and semiconductor device |
| 09/15/2005 | US20050202662 Method for fabricating oxide thin films |