Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
09/2005
09/06/2005US6940135 Mask-ROM process and device to prevent punch through using a halo implant process
09/06/2005US6940133 Integrated trim structure utilizing dynamic doping
09/06/2005US6940132 Semiconductor device and method of manufacturing the same
09/06/2005US6940131 MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication
09/06/2005US6940130 Body contact MOSFET
09/06/2005US6940129 Double gate MOS transistors
09/06/2005US6940128 Semiconductor device for power MOS transistor module
09/06/2005US6940127 Equipment for communication system and semiconductor integrated circuit device
09/06/2005US6940126 Field-effect-controllable semiconductor component and method for producing the semiconductor component
09/06/2005US6940125 Vertical NROM and methods for making thereof
09/06/2005US6940124 Semiconductor device and manufacturing method thereof
09/06/2005US6940122 Flash EEPROM unit cell and memory array architecture including the same
09/06/2005US6940121 Semiconductor memory cell
09/06/2005US6940120 Non-volatile semiconductor memory device and method of fabricating thereof
09/06/2005US6940119 Non-volatile programmable and electrically erasable memory with a single layer of gate material
09/06/2005US6940118 Semiconductor device with high permittivity gate dielectric film
09/06/2005US6940111 Radiation protection in integrated circuits
09/06/2005US6940110 SiC-MISFET and method for fabricating the same
09/06/2005US6940097 Optical property normalization for a transparent electrical device
09/06/2005US6940096 Double gate field effect transistor with diamond film
09/06/2005US6940095 Method of fabricating thin film transistor array
09/06/2005US6940094 used to overcome the problem of heat resistance and difficulty in forming contact holes of aluminum wiring; prevents hillock or whisker from generating; liquid crystal display device
09/06/2005US6940092 Electrically conducting organic compound and electronic device
09/06/2005US6940091 Semiconductor laser module and semiconductor laser apparatus
09/06/2005US6940090 Wideband gap having a low on-resistance and having a high avalanche capability
09/06/2005US6940088 of a zigzag type interconnected between two of an armchair type; for electrical devices
09/06/2005US6940087 Quantum device
09/06/2005US6940086 Tin oxide nanostructures
09/06/2005US6939816 Method to improve the uniformity and reduce the surface roughness of the silicon dielectric interface
09/06/2005US6939815 Method for making a semiconductor device having a high-k gate dielectric
09/06/2005US6939810 Method of forming isolation film
09/06/2005US6939802 Method of manufacturing a semiconductor device
09/06/2005US6939799 Method of forming a field effect transistor and methods of forming integrated circuitry
09/06/2005US6939787 Method for fabricating semiconductor device having gate electrode with polymetal structure of polycrystalline silicon film and metal film
09/06/2005US6939786 Method of manufacturing a semiconductor device having self-aligned contacts
09/06/2005US6939782 Method for producing thin layers on a specific support and an application thereof
09/06/2005US6939781 Method of manufacturing a semiconductor component that includes self-aligning a gate electrode to a field plate
09/06/2005US6939780 Methods of forming trench isolated integrated circuit devices including grooves
09/06/2005US6939779 Method of manufacturing semiconductor device
09/06/2005US6939776 Semiconductor device and a method of fabricating the same
09/06/2005US6939772 Bipolar transistor and fabrication method thereof
09/06/2005US6939771 Discontinuous dielectric interface for bipolar transistors
09/06/2005US6939769 Method for manufacturing a semiconductor device with using double implanting boron and boron difluoride
09/06/2005US6939767 Multi-bit non-volatile integrated circuit memory and method therefor
09/06/2005US6939765 Integration method of a semiconductor device having a recessed gate electrode
09/06/2005US6939763 DRAM cell arrangement with vertical MOS transistors, and method for its fabrication
09/06/2005US6939758 Gate length control for semiconductor chip design
09/06/2005US6939755 Semiconductor device method of manufacturing the same
09/06/2005US6939754 Isotropic polycrystalline silicon and method for producing same
09/06/2005US6939751 Method and manufacture of thin silicon on insulator (SOI) with recessed channel
09/06/2005US6939750 Thin film transistor device and method of manufacturing the same
09/06/2005US6939749 Method of manufacturing a semiconductor device that includes heating the gate insulating film
09/06/2005US6939747 Multiple selectable function integrated circuit module
09/06/2005US6938501 Semiconductor dynamic quantity sensor
09/06/2005CA2261769C Catio3 interfacial template structure on superconductor
09/01/2005WO2005081323A2 Trench-gate semiconductor devices and the manufacture thereof
09/01/2005WO2005081322A1 High voltage and low on-resistance ldmos transistor having equalized capacitance
09/01/2005WO2005081321A1 High voltage ldmos transistor having an isolated structure
09/01/2005WO2005081320A1 Compound semiconductor device and method of producing the same
09/01/2005WO2005081308A2 Protective diode for protecting semiconductor switching circuits from electrostatic discharges
09/01/2005WO2005081307A1 Manufacturing method of semiconductor device, and ic card, ic tag, rfid, transponder, bill, securities, passport, electronic apparatus, bag, and garment
09/01/2005WO2005081304A1 Field effect transistor
09/01/2005WO2005081303A1 Semiconductor device
09/01/2005WO2005081297A1 Thin film heat treating method, heat treating device, thin-film semiconductor device manufacturing method, and electro-optic device
09/01/2005WO2005081296A1 Method for depositing a conductive carbon material on a semiconductor for forming a schottky contact and semiconductor contact device
09/01/2005WO2005080304A1 Polyacene compound and organic semiconductor thin film
09/01/2005WO2005079443A2 Qwip with tunable spectral response
09/01/2005WO2005079400A2 Buried guard ring and radiation hardened isolation structures and fabrication methods
09/01/2005WO2005079366A2 Complimentary nitride transistors vertical and common drain
09/01/2005WO2005079308A2 One dimensional nanostructures for vertical heterointegration on a silicon platform and method for making same
09/01/2005WO2005079293A2 Integrated iii-nitride power devices
09/01/2005WO2005057624A3 Iii-nitride device passivation and method
09/01/2005WO2005036650A3 Insulated gate type semiconductor device and manufacturing method thereof
09/01/2005WO2005029504A3 Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance
09/01/2005WO2005024903A3 Method and structure for improving the gate resistance of a closed cell trench power mosfet
09/01/2005WO2005001904A3 Method of forming freestanding semiconductor layer
09/01/2005WO2004109794B1 Coiled circuit device and method of making the same
09/01/2005WO2004089811A3 Method for manufacturing an electro-mechanical component and an electro-mechanical component, such as a strained si fin-fet
09/01/2005WO2004049396A3 Vertical gate-depleted single electron transistors
09/01/2005US20050193013 Method for evaluating semiconductor device
09/01/2005US20050191911 Transistor structure with minimized parasitics and method of fabricating the same
09/01/2005US20050191864 Magenta toner and method for producing same
09/01/2005US20050191856 Method of forming high aspect ratio structures
09/01/2005US20050191845 Semiconductor device having a guard ring
09/01/2005US20050191844 Low capacitance wiring layout and method for making same
09/01/2005US20050191839 Multiple-ball wire bonds
09/01/2005US20050191831 Semiconductor device manufacture method capable of supressing gate impurity penetration into channel
09/01/2005US20050191829 Solid material comprising a structure of almost-completely-polarised electronic orbitals, method of obtaining same and use thereof in electronics and nanoelectronics
09/01/2005US20050191824 Methods for producing a multilayer semiconductor structure
09/01/2005US20050191821 III-nitride device and method with variable epitaxial growth direction
09/01/2005US20050191818 Integrated circuit with a strongly-conductive buried layer
09/01/2005US20050191817 Semiconductor device and method of fabricating the same
09/01/2005US20050191816 Implanting carbon to form P-type source drain extensions
09/01/2005US20050191815 Metal-oxide-semiconductor device including a buried lightly-doped drain region
09/01/2005US20050191813 Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same
09/01/2005US20050191812 Spacer-less transistor integration scheme for high-k gate dielectrics and small gate-to-gate spaces applicable to Si, SiGe strained silicon schemes
09/01/2005US20050191811 Film forming ring and method of manufacturing semiconductor device
09/01/2005US20050191810 Semiconductor device and method of manufacturing the same
09/01/2005US20050191809 Common MOSFET process for plural devices
09/01/2005US20050191808 Method for removing nanoclusters from selected regions