Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/2005
11/02/2005CN1691297A Method for manufacturing a semiconductor device having a dual-gate structure
11/02/2005CN1691296A Method of manufacturing a semiconductor device and semiconductor device obtainable with such a method
11/02/2005CN1691294A Backgated finfet having diferent oxide thicknesses
11/02/2005CN1691292A Method for manufacturing semiconductor device
11/02/2005CN1691291A Method of manufacturing semiconductor device
11/02/2005CN1691290A Method of processing plasma
11/02/2005CN1691284A Method for manufacturing semiconductor device
11/02/2005CN1691280A Method for manufacturing a semiconductor substrate and method for manufacturing an electro-optical device
11/02/2005CN1691270A Ion implantation apparatus and method
11/02/2005CN1691204A Memory cells using gated diodes and methods of use thereof
11/02/2005CN1690823A Liquid crystal display device
11/02/2005CN1690820A Manufacturing method of a device
11/02/2005CN1690819A Thin-film transistor substrate, display device, CAD program and transfer method for thin-film transistor substrate
11/02/2005CN1225834C High-frequency power amplifier with bipolar transistor
11/02/2005CN1225799C MOSFET and its manufacture
11/02/2005CN1225798C 双极型晶体管 Bipolar transistor
11/02/2005CN1225797C Semiconductor device and method of manufacture thereof
11/02/2005CN1225796C Double-carrier transistor and making method thereof
11/02/2005CN1225786C Windowed non-ceramic package having embedded frame
11/02/2005CN1225782C MROM process and element
11/02/2005CN1225643C Sensor usable in ultra pure and highly corrosive environments
11/02/2005CN1225400C Surface-micromachined absolute pressure sensor and a method for manufacturing thereof
11/01/2005US6961499 Optical devices with engineered nonlinear nanocomposite materials
11/01/2005US6961259 Apparatus and methods for optically-coupled memory systems
11/01/2005US6960837 Method of connecting core I/O pins to backside chip I/O pads
11/01/2005US6960835 Stress-relief layer for semiconductor applications
11/01/2005US6960821 Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction
11/01/2005US6960820 Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
11/01/2005US6960815 Magnetic memory device having yoke layer, and manufacturing method thereof
11/01/2005US6960810 Self-aligned body tie for a partially depleted SOI device structure
11/01/2005US6960809 Polysilicon thin film transistor and method of forming the same
11/01/2005US6960807 Drain extend MOS transistor with improved breakdown robustness
11/01/2005US6960806 Double gated vertical transistor with different first and second gate materials
11/01/2005US6960805 Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell
11/01/2005US6960804 Semiconductor device having a gate structure surrounding a fin
11/01/2005US6960803 Landing pad for use as a contact to a conductive spacer
11/01/2005US6960802 Performing passive voltage contrast on a silicon on insulator semiconductor device
11/01/2005US6960801 High density single transistor ferroelectric non-volatile memory
11/01/2005US6960799 Image sensor with a photodiode array
11/01/2005US6960798 High-voltage semiconductor component
11/01/2005US6960797 Semiconductor device
11/01/2005US6960796 CMOS imager pixel designs with storage capacitor
11/01/2005US6960795 Pixel sensor cell for use in an imaging device
11/01/2005US6960794 Formation of thin channels for TFT devices to ensure low variability of threshold voltages
11/01/2005US6960792 Bi-directional silicon controlled rectifier structure with high holding voltage for latchup prevention
11/01/2005US6960791 Optical semiconductor apparatus
11/01/2005US6960789 Layout of a thin film transistor and the forming method thereof
11/01/2005US6960788 Image recognition device and liquid crystal display apparatus having the same
11/01/2005US6960787 Semiconductor device and method for manufacturing the same
11/01/2005US6960786 Display device
11/01/2005US6960785 MOSFET and method of fabricating the same
11/01/2005US6960782 Electronic devices with fullerene layers
11/01/2005US6960781 Shallow trench isolation process
11/01/2005US6960541 Process for fabrication of a semiconductor component having a tungsten oxide layer
11/01/2005US6960538 Composite dielectric forming methods and composite dielectrics
11/01/2005US6960537 Incorporation of nitrogen into high k dielectric film
11/01/2005US6960527 Method for fabricating non-volatile memory device having sidewall gate structure and SONOS cell structure
11/01/2005US6960524 Method for production of a metallic or metal-containing layer
11/01/2005US6960517 N-gate transistor
11/01/2005US6960515 Method of forming a metal gate
11/01/2005US6960512 Method for manufacturing a semiconductor device having an improved disposable spacer
11/01/2005US6960511 Semiconductor device and method of manufacturing the same
11/01/2005US6960509 Method of fabricating three dimensional gate structure using oxygen diffusion
11/01/2005US6960508 MOS transistor and method of manufacturing the same
11/01/2005US6960507 Vertical double-channel silicon-on-insulator transistor and method of manufacturing the same
11/01/2005US6960505 Method for manufacturing a multi-bit memory cell
11/01/2005US6960502 Semiconductor device fabrication method
11/01/2005US6960501 Method of manufacturing a semiconductor memory device having a non-volatile memory cell portion with single misfet transistor type memory cells and a peripheral circuit portion with misfets
11/01/2005US6960500 Semiconductor device and method of manufacturing the same including forming metal silicide gate lines and source lines
11/01/2005US6960499 Dual-counterdoped channel field effect transistor and method
11/01/2005US6960495 Method for making contacts in a high-density memory
11/01/2005US6960489 Method for structuring an OFET
11/01/2005US6960487 Method for manufacturing a dynamic quantity detection device
11/01/2005US6960484 Method of manufacturing liquid crystal display device
11/01/2005US6960482 Method of fabricating nitride semiconductor and method of fabricating semiconductor device
10/2005
10/27/2005WO2005101528A2 Heterojunction bipolar transistor having non-uniformly doped collector for improved safe-operating area
10/27/2005WO2005101521A1 Semiconductor on insulator substrate and devices formed therefrom
10/27/2005WO2005101520A1 Semiconductor device and manufacturing method thereof
10/27/2005WO2005101519A1 Semiconductor device and manufacturing method thereof
10/27/2005WO2005101518A1 Method for manufacturing semiconductor device
10/27/2005WO2005101517A1 Bipolar transistor incorporating resistor
10/27/2005WO2005101516A2 Sequentially charged nanocrystal light emitting device
10/27/2005WO2005101515A2 Process to improve transistor drive current through the use of strain
10/27/2005WO2005101488A1 Nonvolatile semiconductor storage element having high charge holding characteristics and method for fabricating the same
10/27/2005WO2005101477A1 Semiconductor device and its manufacturing method
10/27/2005WO2005101472A1 Method for manufacturing semiconductor integrated circuit device
10/27/2005WO2005100236A1 Method of packaging mems device in vacuum state and mems device vacuum-packaged using the same
10/27/2005WO2005100070A1 Hydraulically operated automobile
10/27/2005WO2005088729A3 Semiconductor component, especially a diode, and corresponding production method
10/27/2005WO2005083792A3 Composite quantum dot structures
10/27/2005WO2005071758A3 Phototransistor
10/27/2005WO2005064662A3 A semiconductor substrate with solid phase epitaxial regrowth with reduced depth of doping profile and method of producing same
10/27/2005WO2005060000A3 Bridge field-effect transistor storage cell, device comprising said cells and method for producing a bridge field-effect transistor storage cell
10/27/2005WO2005059961A3 Low crosstalk substrate for mixed-signal integrated circuits
10/27/2005WO2005048320A3 Method for integrating metals having different work functions to form cmos gates having a high-k gate dielectric and related structure
10/27/2005WO2005008730A3 Low cost, high performance flip chip package structure
10/27/2005US20050239269 Method for releasing stress of embedded chip and chip embedded structure
10/27/2005US20050239259 High voltage power device with low diffusion pipe resistance
10/27/2005US20050239256 Shallow low energy ion implantation into pad oxide for improving threshold voltage stability
10/27/2005US20050239255 Formation of lattice-tuning semiconductor substrates