Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
10/2005
10/18/2005US6956882 Gallium nitride semiconductor light emitting device having multi-quantum-well structure active layer, and semiconductor laser light source device
10/18/2005US6956771 Voltage control circuit for high voltage supply
10/18/2005US6956638 Display device and method of manufacturing the same
10/18/2005US6956295 Flip-chip image sensor packages
10/18/2005US6956278 Low-density, high-resistivity titanium nitride layer for use as a contact for low-leakage dielectric layers
10/18/2005US6956277 Diode junction poly fuse
10/18/2005US6956276 Semiconductor device with an L-shaped/reversed L-shaped gate side-wall insulating film
10/18/2005US6956271 Switching of soft reference layers of magnetic memory devices
10/18/2005US6956269 Spin-polarization of carriers in semiconductor materials for spin-based microelectronic devices
10/18/2005US6956267 Semiconductor with a nitrided silicon gate oxide and method
10/18/2005US6956266 Structure and method for latchup suppression utilizing trench and masked sub-collector implantation
10/18/2005US6956265 Semiconductor device and method for manufacturing partial SOI substrates
10/18/2005US6956264 Trenched semiconductor devices and their manufacture
10/18/2005US6956263 Field effect transistor structure with self-aligned raised source/drain extensions
10/18/2005US6956262 Charge trapping pull up element
10/18/2005US6956260 Integrated semiconductor memory with wordlines conductively connected to one another in pairs
10/18/2005US6956259 Semiconductor device and method of manufacturing the same
10/18/2005US6956258 Reprogrammable non-volatile memory using a breakdown phenomena in an ultra-thin dielectric
10/18/2005US6956257 Magnetic memory element and memory device including same
10/18/2005US6956256 Vertical gain cell
10/18/2005US6956255 Semiconductor device and drive circuit using the semiconductor devices
10/18/2005US6956254 Multilayered dual bit memory device with improved write/erase characteristics and method of manufacturing
10/18/2005US6956253 Color filter with resist material in scribe lines
10/18/2005US6956250 Gallium nitride materials including thermally conductive regions
10/18/2005US6956249 Termination of semiconductor components
10/18/2005US6956248 Semiconductor device for low voltage protection with low capacitance
10/18/2005US6956239 Transistors having buried p-type layers beneath the source region
10/18/2005US6956238 Silicon carbide power metal-oxide semiconductor field effect transistors having a shorting channel and methods of fabricating silicon carbide metal-oxide semiconductor field effect transistors having a shorting channel
10/18/2005US6956237 Thin film transistor array substrate and method for manufacturing the same
10/18/2005US6956236 comprises electrode (wiring) having copper layer surrounded by a coating film made of titanium or titanium or titanium oxide; thin film transistors (TFT); liquid crystal displays (LCD)
10/18/2005US6956235 Semiconductor device
10/18/2005US6955980 Reducing the migration of grain boundaries
10/18/2005US6955978 Uniform contact
10/18/2005US6955973 Method for forming a semiconductor device
10/18/2005US6955970 Process for manufacturing a low voltage MOSFET power device having a minimum figure of merit
10/18/2005US6955969 Method of growing as a channel region to reduce source/drain junction capacitance
10/18/2005US6955968 Graded composition gate insulators to reduce tunneling barriers in flash memory devices
10/18/2005US6955967 Non-volatile memory having a reference transistor and method for forming
10/18/2005US6955965 Process for fabrication of nitride layer with reduced hydrogen content in ONO structure in semiconductor device
10/18/2005US6955963 Damascene architecture electronic storage and method for making same
10/18/2005US6955962 Deep trench capacitor having increased surface area
10/18/2005US6955960 Decoupling capacitor for high frequency noise immunity
10/18/2005US6955959 Method of making a memory structure having a multilayered contact and a storage capacitor with a composite dielectric layer of crystalized niobium pentoxide and tantalum pentoxide films
10/18/2005US6955957 Method of forming a floating gate in a flash memory device
10/18/2005US6955956 Method of manufacturing a semiconductor device
10/18/2005US6955954 Semiconductor device and method for manufacturing the same
10/18/2005US6955953 Method of manufacturing a semiconductor device having thin film transistor and capacitor
10/18/2005US6955947 Backside metallization on microelectronic dice having beveled sides for effective thermal contact with heat dissipation devices
10/18/2005US6955936 Methods and devices related to electrode pads for p-type Group III nitride compound semiconductors
10/18/2005US6955934 Wafer-level packaging of optical receivers
10/18/2005US6955932 Single and double-gate pseudo-FET devices for semiconductor materials evaluation
10/18/2005US6955858 Transition metal doped ferromagnetic III-V nitride material films and methods of fabricating the same
10/18/2005US6955091 Pressure sensor apparatus
10/18/2005CA2341513C Millimeter wave and far-infrared detector
10/13/2005WO2005096393A1 Backside thinning of image array devices
10/13/2005WO2005096390A1 High power voltage limiter
10/13/2005WO2005096389A1 Trench semiconductor device and method of manufacturing it
10/13/2005WO2005096388A1 Integrated circuit with a very small-sized reading diode
10/13/2005WO2005096387A2 Semiconductor device having a laterally modulated gate workfunction and method of fabrication
10/13/2005WO2005096386A1 Parameter adjuster
10/13/2005WO2005096384A1 Semiconductor apparatus, solid state image pickup device, and image pickup system
10/13/2005WO2005096372A1 Method for fabricating strained silicon-on-insulator structures and strained silicon-on -insulator structures formed thereby
10/13/2005WO2005096366A1 A method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same
10/13/2005WO2005096365A1 Semiconductor device
10/13/2005WO2005096363A1 Method of plasma treatment and process for producing electronic appliance
10/13/2005WO2005096362A1 Method and apparatus for forming metal silicate film, and method for manufacturing semiconductor device
10/13/2005WO2005096358A1 A silicon germanium surface layer for high-k dielectric integ ration
10/13/2005WO2005096357A1 Method for manufacturing semiconductor device
10/13/2005WO2005096355A1 Compound semiconductor device, production method of compound semiconductor device and diode
10/13/2005WO2005096352A2 Silicon-germanium thin layer semiconductor structure with variable silicon-germanium composition and method of fabrication
10/13/2005WO2005094534A2 A semiconductor device having a silicided gate electrode and method of manufacture therefor
10/13/2005WO2005094515A2 Structure and method for contact pads having an overcoat-protected bondable metal plug over copper-metallized integrated circuits
10/13/2005WO2005094491A2 Spatial light modulator with robust mirror substrate condition
10/13/2005WO2005094320A2 Method of separating layers of material using a laser beam
10/13/2005WO2005094299A2 Improved cmos transistors and methods of forming same
10/13/2005WO2005094271A2 Colloidal quantum dot light emitting diodes
10/13/2005WO2005094254A2 Crystalline-type device and approach therefor
10/13/2005WO2005094244A2 System, method and apparatus for self-cleaning dry etch
10/13/2005WO2005078800A3 Integrated circuit arrangement with esd-resistant capacitor and corresponding method of production
10/13/2005WO2005075339A3 Novel nanostructures and method for selective preparation
10/13/2005WO2005069379A3 Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
10/13/2005WO2005057663A3 Method and apparatus for fabrication of metal-oxide semiconductor integrated circuit devices
10/13/2005WO2005057662A3 Method and apparatus for fabricating ultra-shallow junction metal-oxide semiconductor integrated circuit devices.
10/13/2005WO2005045935A3 Sidewall formation for high density polymer memory element array
10/13/2005WO2004075685A3 Reading stand
10/13/2005US20050227504 Method for crystallizing semiconductor with laser beams
10/13/2005US20050227501 Method for fabricating semiconductor integrated circuit device
10/13/2005US20050227498 Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby
10/13/2005US20050227486 Method of improving residue and thermal characteristics of semiconductor device
10/13/2005US20050227481 Solid-state circuit assembly
10/13/2005US20050227477 Method for fabricating semiconductor device and acceleration sensor
10/13/2005US20050227470 Method for manufacturing a semiconductor device having a W/WN/polysilicon layered film
10/13/2005US20050227469 Method of manufacturing semiconductor device
10/13/2005US20050227468 Semiconductor device with spacer having batch and non-batch layers
10/13/2005US20050227466 Transistor, method for producing an integrated circuit and a method of producing a metal silicide layer
10/13/2005US20050227461 Semiconductor device having increased switching speed
10/13/2005US20050227460 Method and apparatus for crystallizing semiconductor with laser beams
10/13/2005US20050227459 Film formation method and apparatus for semiconductor process
10/13/2005US20050227458 Method for producing structured substrate, structured substrate, method for producing semiconductor light emitting device, semiconductor light emitting device, method for producing semiconductor device, semiconductor device, method for producing device, and device
10/13/2005US20050227455 Method of separating layers of material