Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
07/2006
07/04/2006US7071569 Electrical package capable of increasing the density of bonding pads and fine circuit lines inside a interconnection
07/04/2006US7071568 Stacked-die extension support structure and method thereof
07/04/2006US7071565 Patterning three dimensional structures
07/04/2006US7071564 Composite tantalum capped inlaid copper with reduced electromigration and reduced stress migration
07/04/2006US7071562 Interconnects with improved barrier layer adhesion
07/04/2006US7071559 Design of beol patterns to reduce the stresses on structures below chip bondpads
07/04/2006US7071556 Tape ball grid array package with electromagnetic interference protection and method for fabricating the package
07/04/2006US7071554 Stress mitigation layer to reduce under bump stress concentration
07/04/2006US7071549 Acceleration sensor and method of manufacturing acceleration sensor
07/04/2006US7071543 Semiconductor device and manufacturing method thereof
07/04/2006US7071537 Power device having electrodes on a top surface thereof
07/04/2006US7071536 Semiconductor device and manufacturing method thereof
07/04/2006US7071535 Integrated circuit package having inductance loop formed from a bridge interconnect
07/04/2006US7071534 Antifuse structure and method of use
07/04/2006US7071533 Bipolar junction transistor antifuse
07/04/2006US7071532 Adjustable self-aligned air gap dielectric for low capacitance wiring
07/04/2006US7071531 Trench isolation for semiconductor devices
07/04/2006US7071529 Semiconductor device having a Damascene gate or a replacing gate
07/04/2006US7071528 Double-triggered silicon controlling rectifier and electrostatic discharge protection circuit thereof
07/04/2006US7071527 Semiconductor element and manufacturing method thereof
07/04/2006US7071526 Semiconductor device having Schottky junction electrode
07/04/2006US7071525 Merged P-i-N schottky structure
07/04/2006US7071522 Magnetoresistance effect element, magnetic head and magnetic reproducing apparatus
07/04/2006US7071521 Process for producing microelectromechanical components and a housed microelectromechanical component
07/04/2006US7071519 Control of high-k gate dielectric film composition profile for property optimization
07/04/2006US7071517 Self-aligned semiconductor contact structures and methods for fabricating the same
07/04/2006US7071516 Semiconductor device and driving circuit for semiconductor device
07/04/2006US7071515 Narrow width effect improvement with photoresist plug process and STI corner ion implantation
07/04/2006US7071513 Layout optimization of integrated trench VDMOS arrays
07/04/2006US7071512 Non-volatile semiconductor memory device
07/04/2006US7071511 Nonvolatile semiconductor memory device having adjacent selection transistors connected together
07/04/2006US7071510 Capacitor of an integrated circuit device and method of manufacturing the same
07/04/2006US7071509 Method of improving the top plate electrode stress inducting voids for 1T-RAM process
07/04/2006US7071508 Capacitor constructions, semiconductor constructions, and methods of forming electrical contacts and semiconductor constructions
07/04/2006US7071506 Device for inhibiting hydrogen damage in ferroelectric capacitor devices
07/04/2006US7071505 Method and apparatus for reducing imager floating diffusion leakage
07/04/2006US7071504 Thin film transistor device and method of manufacturing the same
07/04/2006US7071503 Semiconductor structure with a switch element and an edge element
07/04/2006US7071502 Charge coupled device used in an image sensor and a method of making the charge coupled device
07/04/2006US7071501 Image sensor having integrated single large scale pixel and pixel separation pattern
07/04/2006US7071500 Semiconductor device and manufacturing method for the same
07/04/2006US7071499 Heterojunction field effect type semiconductor device having high gate turn-on voltage and low on-resistance and its manufacturing method
07/04/2006US7071498 Gallium nitride material devices including an electrode-defining layer and methods of forming the same
07/04/2006US7071494 Light emitting device with enhanced optical scattering
07/04/2006US7071491 TO-CAN type optical module
07/04/2006US7071489 Silicon plate and solar cell
07/04/2006US7071488 Active matrix display device and thin film transistor display device
07/04/2006US7071485 Semiconductor integrated circuit device
07/04/2006US7071407 Method and apparatus of multiplejunction solar cell structure with high band gap heterojunction middle cell
07/04/2006US7071122 Field effect transistor with etched-back gate dielectric
07/04/2006US7071120 Method for producing water for use in manufacturing semiconductors
07/04/2006US7071119 Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure
07/04/2006US7071102 Method of forming a metal silicide layer on non-planar-topography polysilicon
07/04/2006US7071086 Method of forming a metal gate structure with tuning of work function by silicon incorporation
07/04/2006US7071082 Silicon crystallization method
07/04/2006US7071076 Method of manufacturing semiconductor device
07/04/2006US7071069 Shallow amorphizing implant for gettering of deep secondary end of range defects
07/04/2006US7071068 Transistor and method for fabricating the same
07/04/2006US7071067 Fabrication of integrated devices using nitrogen implantation
07/04/2006US7071066 Method and structure for forming high-k gates
07/04/2006US7071065 Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication
07/04/2006US7071064 U-gate transistors and methods of fabrication
07/04/2006US7071062 Integrated device with Schottky diode and MOS transistor and related manufacturing process
07/04/2006US7071060 EEPROM with split gate source side infection with sidewall spacers
07/04/2006US7071056 Method of forming a dual-sided capacitor
07/04/2006US7071055 Method of forming a contact structure including a vertical barrier structure and two barrier layers
07/04/2006US7071050 Semiconductor integrated circuit device having single-element type non-volatile memory elements
07/04/2006US7071049 Silicon rich barrier layers for integrated circuit devices
07/04/2006US7071048 Methods of fabricating fin field effect transistors having capping insulation layers
07/04/2006US7071040 Method of fabricating thin film transistor
07/04/2006US7071037 Semiconductor device and manufacturing method thereof
07/04/2006US7071035 Apparatus and method for laser radiation
07/04/2006US7071029 Methods for fabricating final substrates
07/04/2006US7071023 Nanotube device structure and methods of fabrication
07/04/2006US7071020 Method of forming an elevated photodiode in an image sensor
07/04/2006US7071017 Micro structure with interlock configuration
07/04/2006US7071016 Micro-electro mechanical systems (MEMS) device using silicon on insulator (SOI) wafer, and method of fabricating and grounding the same
07/04/2006US7071012 Methods relating to the reconstruction of semiconductor wafers for wafer-level processing
07/04/2006US7070851 Web process interconnect in electronic assemblies
07/04/2006US7070831 chip size semiconductor package, which is an ultra-thin size; metal-plated film on a lower surface of the conductive wire patterns under the first openings and attached to the wire pattern by a direct pressure of an ultra-sound heat compression
07/04/2006US7070088 Method of semiconductor device assembly including fatigue-resistant ternary solder alloy
07/04/2006US7069789 Inertial sensor
06/2006
06/29/2006WO2006068265A1 Semiconductor device
06/29/2006WO2006068189A1 Organic thin-film transistor and method for manufacturing same
06/29/2006WO2006068027A1 Semiconductor device and its manufacturing method
06/29/2006WO2006067678A1 Semiconductor device with a superparaelectric gate insulator
06/29/2006WO2006067107A1 Transistor device and method of manufacture thereof
06/29/2006WO2006066890A1 Bipolar reading technique for a memory cell having an electrically floating body transistor
06/29/2006WO2006057686A3 Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same
06/29/2006WO2005109514A3 Insulated gate semiconductor device
06/29/2006WO2005094299A3 Improved cmos transistors and methods of forming same
06/29/2006WO2005065127B1 A method for forming thick dielectric regions using etched trenches
06/29/2006US20060141786 Method of manufacturing an electronic device and electronic device
06/29/2006US20060141770 Method for fabricating storage node contact in semiconductor device
06/29/2006US20060141753 Epitaxial structure of gallium nitride series semiconductor device and process of manufacturing the same
06/29/2006US20060141732 Method for forming isolation region in semiconductor device
06/29/2006US20060141726 Field effect transistor with a high breakdown voltage and method of manufacturing the same
06/29/2006US20060141715 Integrated circuit devices having contact holes exposing gate electrodes in active regions and methods of fabricating the same
06/29/2006US20060141701 Semiconductor device having trench capacitors and method for making the trench capacitors
06/29/2006US20060141697 Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction