Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2013
04/11/2013WO2013006003A3 In-line heat treatment apparatus
04/11/2013WO2013002601A3 Memory device using graphene and method for manufacturing same
04/11/2013WO2013002567A3 Bubbler for compound vaporization using carrier gas
04/11/2013WO2013002502A3 Texture etchant composition for crystalline silicon wafer and texture etching method thereof
04/11/2013WO2012177064A3 Deposition apparatus
04/11/2013WO2012175473A3 Method for calibrating a robot mounted on active magnetic bearings
04/11/2013WO2012170511A3 Methods for cleaning a surface of a substrate using a hot wire chemical vapor deposition (hwcvd) chamber
04/11/2013WO2012166945A3 Vertical diodes for non-volatile memory device
04/11/2013WO2012166911A3 Low void solder joint for multiple reflow applications
04/11/2013WO2012166732A3 Method of forming high growth rate, low resistivity germanium film on silicon substrate
04/11/2013WO2012158847A3 Materials and methods for the preparation of nanocomposites
04/11/2013WO2012158528A3 High temperature electrostatic chuck with radial thermal chokes
04/11/2013WO2012061436A3 Dry etching method of surface texture formation on silicon wafer
04/11/2013WO2012047342A3 Methods of forming semiconductor contacts and related semiconductor devices
04/11/2013US20130089988 Selective etch of silicon by way of metastable hydrogen termination
04/11/2013US20130089987 Method of barc removal in semiconductor device manufacturing
04/11/2013US20130089986 Method of forming patterns of semiconductor device
04/11/2013US20130089985 Enhancing Transistor Performance by Reducing Exposure to Oxygen Plasma in a Dual Stress Liner Approach
04/11/2013US20130089984 Sidewall image transfer process with multiple critical dimensions
04/11/2013US20130089983 Method of manufacturing semiconductor device
04/11/2013US20130089982 Method of Fabricating a Substrate Having Conductive Through Holes
04/11/2013US20130089981 Method of manufacturing semiconductor device
04/11/2013US20130089980 Mosfet integrated circuit having doped conductive interconnects and methods for its manufacture
04/11/2013US20130089979 Semiconductor device having a multilevel interconnect structure and method for fabricating the same
04/11/2013US20130089978 Integrated circuit using fdsoi technology, with well sharing and means for biasing oppositely doped ground planes present in a same well
04/11/2013US20130089977 Method for forming high density patterns
04/11/2013US20130089976 Fuse structure for high integrated semiconductor device
04/11/2013US20130089975 Method for manufacturing semiconductor device
04/11/2013US20130089974 Method of manufacturing a non-volatile memory device having a vertical structure
04/11/2013US20130089973 Method of manufacturing nitride semiconductor device
04/11/2013US20130089972 Method for forming nanocrystalline silicon film
04/11/2013US20130089970 Method of manufacturing semiconductor device
04/11/2013US20130089969 Method for Slicing a Substrate Wafer
04/11/2013US20130089968 Method for finishing silicon on insulator substrates
04/11/2013US20130089967 Temporary adhesive composition and method for manufacturing thin wafer using the same
04/11/2013US20130089966 Methods of Processing Units Comprising Crystalline Materials, and Methods of Forming Semiconductor-On-Insulator Constructions
04/11/2013US20130089963 Manufacturing method of semiconductor device
04/11/2013US20130089962 Semiconductor process
04/11/2013US20130089961 Methods of Forming Semiconductor Devices Including an Epitaxial Layer and Semiconductor Devices Formed Thereby
04/11/2013US20130089959 Controlling the Shape of Source/Drain Regions in FinFETs
04/11/2013US20130089958 Finlike Structures and Methods of Making Same
04/11/2013US20130089956 Patterning Contacts in Carbon Nanotube Devices
04/11/2013US20130089955 Process for encapsulating a micro-device by attaching a cap and depositing getter through the cap
04/11/2013US20130089954 Method of fabricating electronic device having flexible device
04/11/2013US20130089953 Wafer Level Packaging Using a Lead-Frame
04/11/2013US20130089952 Packaging Process Tools and Packaging Methods for Semiconductor Devices
04/11/2013US20130089951 Wafer Level Packaging Using a Lead-Frame
04/11/2013US20130089948 Vapor transport deposition method and system for material co-deposition
04/11/2013US20130089936 Method for manufacturing semiconductor device
04/11/2013US20130089935 Overlay and semiconductor process control using a wafer geometry metric
04/11/2013US20130089934 Material Delivery System and Method
04/11/2013US20130089701 Substrate containing aperture and methods of forming the same
04/11/2013US20130089396 Reduced capacity carrier, transport, load port, buffer system
04/11/2013US20130089358 Semiconductor device, led head and image forming apparatus
04/11/2013US20130088838 Die package, method of manufacturing the same, and systems including the same
04/11/2013US20130088667 Liquid crystal display and manufacturing method thereof
04/11/2013US20130088498 Electromechanical systems device with non-uniform gap under movable element
04/11/2013US20130088030 Method and apparatus for manipulating a substrate
04/11/2013US20130087959 Opitcally tuned metalized light to heat conversion layer for wafer support system
04/11/2013US20130087934 Substrate for display device and method for manufacturing the same
04/11/2013US20130087933 Structure for encapsulating an electronic device and method for making such a structure
04/11/2013US20130087931 Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure
04/11/2013US20130087930 Semiconductor structure and method for making same
04/11/2013US20130087928 Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring
04/11/2013US20130087926 Stacked semiconductor devices
04/11/2013US20130087924 Semiconductor device and method for manufacturing same
04/11/2013US20130087921 Semiconductor Arrangement for Galvanically Isolated Signal Transmission and Method for Producing Such an Arrangement
04/11/2013US20130087920 Integrated Circuit Structure Having Dies with Connectors of Different Sizes
04/11/2013US20130087916 Methods of Packaging Semiconductor Devices and Structures Thereof
04/11/2013US20130087915 Copper Stud Bump Wafer Level Package
04/11/2013US20130087914 Wafer level chip scale package and method of manufacturing the same
04/11/2013US20130087912 Semiconductor device, electronic device, and semiconductor device manufacturing method
04/11/2013US20130087907 Metal Features to Reduce Crack-Inducing Stresses in Metallization Stacks
04/11/2013US20130087905 Curable organopolysiloxane composition and semiconductor device
04/11/2013US20130087904 Wafer level applied thermal heat sink
04/11/2013US20130087903 Electronics Packaging For High Temperature Downhole Applications
04/11/2013US20130087902 Integrated circuit packaging system with thermal structures and method of manufacture thereof
04/11/2013US20130087901 Design for exposed die package
04/11/2013US20130087898 Semiconductor Device and Method of Forming Prefabricated Multi-Die Leadframe for Electrical Interconnect of Stacked Semiconductor Die
04/11/2013US20130087895 Radiation-shielded semiconductor device
04/11/2013US20130087894 Flange package for a semiconductor device
04/11/2013US20130087893 Through Silicon Via Structure, Method of Formation, and Integration in Semiconductor Substrate
04/11/2013US20130087892 Electrical Connection for Chip Scale Packaging
04/11/2013US20130087891 Semiconductor chip and fabricating method thereof
04/11/2013US20130087886 MOM Capacitor Having Local Interconnect Metal Plates and Related Method
04/11/2013US20130087883 Integrated Circuit Devices And Methods Of Forming Memory Array And Peripheral Circuitry Isolation
04/11/2013US20130087882 Lateral etch stop for nems release etch for high density nems/cmos monolithic integration
04/11/2013US20130087880 Mems device and method of manufacture
04/11/2013US20130087879 Schottky diode with buried layer in gan materials
04/11/2013US20130087878 Method of fabricating a gan merged p-i-n schottky (mps) diode
04/11/2013US20130087868 Integrated hall-controlled switch devices
04/11/2013US20130087867 Method for operating CMUTs under high and varying pressure
04/11/2013US20130087861 Semiconductor device and fabrication method thereof
04/11/2013US20130087860 Borderless self-aligned metal contact patterning using printable dielectric materials
04/11/2013US20130087859 Work Function Adjustment By Carbon Implant In Semiconductor Devices Including Gate Structure
04/11/2013US20130087857 Nitrogen passivation of source and drain recesses
04/11/2013US20130087856 Effective Work Function Modulation by Metal Thickness and Nitrogen Ratio for a Last Approach CMOS Gate
04/11/2013US20130087855 Semiconductor integrated circuit device and manufacturing method for semiconductor integrated circuit device
04/11/2013US20130087854 Method of manufacturing a semiconductor device and the semiconductor device
04/11/2013US20130087850 Semiconductor device having dmos integration