Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2013
04/18/2013WO2013027968A3 Apparatus for fabricating ingot, method for providing material, and method for fabricating ingot
04/18/2013WO2013025629A3 Wafer carrier
04/18/2013WO2013022633A3 Substrate support with heater
04/18/2013WO2013022616A3 Robot systems, apparatus, and methods adapted to transport substrates in electronic device manufacturing
04/18/2013WO2013019541A3 Low-stress vias
04/18/2013WO2013019432A3 Method for uninterrupted production of a polyatomic boron molecular ion beam with self-cleaning
04/18/2013WO2013016341A3 Methods of forming a metal silicide region in an integrated circuit
04/18/2013WO2013015934A3 Memory cells and methods of storing information
04/18/2013WO2013012549A3 Multi-chamber cvd processing system
04/18/2013WO2013006363A3 Memory cell structures
04/18/2013WO2012178199A3 Memory array architecture with two-terminal memory cells
04/18/2013WO2012052252A3 Starter material for a sintering compound and method for producing said sintering compound
04/18/2013US20130095669 Substrate processing method and substrate processing apparatus
04/18/2013US20130095668 Semiconductor device manufacturing method and substrate processing apparatus
04/18/2013US20130095667 Gas barrier with vent ring for protecting a surface region from liquid
04/18/2013US20130095666 Plasma confinement rings including rf absorbing material for reducing polymer deposition
04/18/2013US20130095665 Systems and methods for processing substrates
04/18/2013US20130095664 Atomic layer deposition of antimony oxide films
04/18/2013US20130095663 Method of forming a semiconductor memory device
04/18/2013US20130095662 Integrated circuit method with triple patterning
04/18/2013US20130095661 Cmp method, cmp apparatus and method of manufacturing semiconductor device
04/18/2013US20130095660 Method for polishing silicon wafer
04/18/2013US20130095659 Method for producing silicon waveguides on non-soi substrate
04/18/2013US20130095658 Metal organic chemical vapor deposition method and apparatus
04/18/2013US20130095657 Post-etch treating method
04/18/2013US20130095656 Semiconductor device and method of manufacturing the same
04/18/2013US20130095655 Methods Of Forming Circuit Structures Within Openings And Methods Of Forming Conductive Lines Across At Least A Portion Of A Substrate
04/18/2013US20130095654 Methods of manufacturing a vertical type semiconductor device
04/18/2013US20130095653 Non-volatile memory devices including vertical nand strings and methods of forming the same
04/18/2013US20130095652 Method for fabricating semiconductor device
04/18/2013US20130095651 Tunable Semiconductor Component Provided with a Current Barrier
04/18/2013US20130095650 System And Method For Constructing Waffle Transistors
04/18/2013US20130095649 Chemical Bath Replenishment
04/18/2013US20130095648 Technique for reducing topography-related irregularities during the patterning of a dielectric material in a contact level of closely spaced transistors
04/18/2013US20130095644 Planarization process for semiconductor device fabrication
04/18/2013US20130095643 Methods for implanting dopant species in a substrate
04/18/2013US20130095642 Junction leakage reduction through implantation
04/18/2013US20130095641 Method Of Manufacturing Gallium Nitride Film
04/18/2013US20130095640 Reusable substrates for electronic device fabrication and methods thereof
04/18/2013US20130095639 Film for back surface of flip-chip semiconductor, dicing-tape-integrated film for back surface of semiconductor, process for producing semiconductor device, and flip-chip semiconductor device
04/18/2013US20130095638 Method of Fabricating Integrated Circuits
04/18/2013US20130095637 Method of fabricating a semiconductor device
04/18/2013US20130095636 Process for producing at least one deep trench isolation
04/18/2013US20130095635 Method for fabricating nonvolatile memory device
04/18/2013US20130095633 Methods of manufacturing variable resistance memory and semiconductor device
04/18/2013US20130095632 Enhanced Work Function Layer Supporting Growth of Rutile Phase Titanium Oxide
04/18/2013US20130095630 Threshold mismatch and iddq reduction using split carbon co-implantation
04/18/2013US20130095629 Finfet Parasitic Capacitance Reduction Using Air Gap
04/18/2013US20130095628 Mask rom fabrication method
04/18/2013US20130095627 Methods of Forming Source/Drain Regions on Transistor Devices
04/18/2013US20130095626 Method for manufacturing semiconductor device
04/18/2013US20130095623 Vertical transistor having an asymmetric gate
04/18/2013US20130095622 Method of manufacturing a semiconductor device
04/18/2013US20130095621 Method of Manufacture of a Passive High-Frequency Image Reject Mixer
04/18/2013US20130095620 Methods of forming highly scaled semiconductor devices using a disposable spacer technique
04/18/2013US20130095619 Performance and reducing variation of narrow channel devices
04/18/2013US20130095616 Method for manufacturing multi-gate transistor device
04/18/2013US20130095615 Manufacturing method of package structure
04/18/2013US20130095614 Wafer level packaging of semiconductor chips
04/18/2013US20130095613 Fabrication method of semiconductor devices and fabrication system of semiconductor devices
04/18/2013US20130095612 Wafer level packaging method of encapsulating the bottom and side of a semiconductor chip
04/18/2013US20130095611 Packaging Methods for Semiconductor Devices
04/18/2013US20130095610 Package-on-package assembly with wire bond vias
04/18/2013US20130095609 Device and Method for Manufacturing a Device
04/18/2013US20130095608 Methods for Forming 3DIC Package
04/18/2013US20130095607 Methods and Apparatus For Alignment In Flip Chip Bonding
04/18/2013US20130095606 Fabrication Method for ZnO Thin Film Transistors Using Etch-stop Layer
04/18/2013US20130095599 Photovoltaic device using nano-spheres for textured electrodes
04/18/2013US20130095586 Method of cutting light emitting element packages employing ceramic substrate, and method of cutting multilayered object
04/18/2013US20130095581 Thick window layer led manufacture
04/18/2013US20130095580 Semiconductor device and structure
04/18/2013US20130095577 System and method for measuring layer thickness and depositing semiconductor layers
04/18/2013US20130095576 Transformer signal coupling for flip-chip integration
04/18/2013US20130094287 Semiconductor memory devices and methods of manufacturing the same
04/18/2013US20130094006 Substrate conveyance device and substrate conveyance method, exposure apparatus and exposure method, device manufacturing method
04/18/2013US20130093650 Display Device
04/18/2013US20130093497 Tunnel field effect transistor (tfet) with lateral oxidation
04/18/2013US20130093146 Ceramic-metal bonded body
04/18/2013US20130093145 Electrostatic chuck
04/18/2013US20130093104 Bond pad structure and fabricating method thereof
04/18/2013US20130093100 Semiconductor Device and Method of Forming Conductive Pillar Having an Expanded Base
04/18/2013US20130093098 Through substrate via structures and methods of forming the same
04/18/2013US20130093097 Package-On-Package (PoP) Structure and Method
04/18/2013US20130093094 Method and Apparatus for Die Assembly
04/18/2013US20130093093 Semiconductor device with damascene bit line and method for fabricating the same
04/18/2013US20130093092 Electronic device and method for producing same
04/18/2013US20130093091 Three-Dimensional Vertical Interconnecting Structure and Manufacturing Method Thereof
04/18/2013US20130093089 Interconnect Structure With An Electromigration and Stress Migration Enhancement Liner
04/18/2013US20130093088 Package-on-package assembly with wire bond vias
04/18/2013US20130093086 Semiconductor package and method of fabricating the same
04/18/2013US20130093085 Dual interlock heatsink assembly for enhanced cavity pbga packages, and method of manufacture
04/18/2013US20130093080 Multi-chip package and method of manufacturing the same
04/18/2013US20130093075 Semiconductor Device Package and Method
04/18/2013US20130093072 Leadframe pad design with enhanced robustness to die crack failure
04/18/2013US20130093071 Optical module with a lens encapsulated within sealant and method for manufacturing the same
04/18/2013US20130093069 Package structure and the method to fabricate thereof
04/18/2013US20130093068 Semiconductor Device and Method of Forming Air Gap Adjacent to Stress Sensitive Region of the Die
04/18/2013US20130093067 Wafer level applied rf shields
04/18/2013US20130093064 Semiconductor structure and fabrication method thereof
04/18/2013US20130093063 Bonded substrate and method of manufacturing the same