Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/1989
05/17/1989EP0316026A1 Procedure for soldering a semiconductor component (chip) to a supporting unit
05/17/1989EP0315980A2 Semiconductor device having conductive layers
05/17/1989EP0315954A2 Pattern-forming material and pattern formation method
05/17/1989EP0315803A2 A DRAM cell formed on an insulating layer having a buried semiconductor pillar structure and a manufacturing method thereof
05/17/1989EP0315748A2 Positive-working radiation-sensitive composistion and radiation-sensitive recording material produced therefrom
05/17/1989EP0315678A1 High volume crystal plating apparatus and method
05/17/1989EP0315655A1 Coplanar die to a silicon substrate bond method.
05/17/1989EP0172229B1 High speed cmos circuits
05/17/1989EP0124624B1 Semiconductor device
05/17/1989CN2037874U Automatic film-conveying and-withdrawing device
05/16/1989US4831495 Unitized packaging arrangement for an energy dissipating device
05/16/1989US4831433 Semiconductor device
05/16/1989US4831425 Integrated circuit having improved contact region
05/16/1989US4831423 Semiconductor devices employing conductivity modulation
05/16/1989US4831422 Field effect transistor
05/16/1989US4831328 Measurement processing arrangement
05/16/1989US4831274 Surface inspecting device for detecting the position of foreign matter on a substrate
05/16/1989US4831272 Apparatus for aligning a reticle mark and substrate mark
05/16/1989US4831270 Ion implantation apparatus
05/16/1989US4831212 Package for packing semiconductor devices and process for producing the same
05/16/1989US4831172 Benzocyclobutene-based organosilane adhesion aids
05/16/1989US4830987 Semiconductors, spacers
05/16/1989US4830985 Method of replacing an image sensor array
05/16/1989US4830984 Dimensional stability
05/16/1989US4830983 Impurity induced disordering
05/16/1989US4830982 Resistivity
05/16/1989US4830981 Trench capacitor process for high density dynamic ram
05/16/1989US4830980 Making complementary integrated p-MODFET and n-MODFET
05/16/1989US4830979 Method of manufacturing hermetically sealed compression bonded circuit assemblies
05/16/1989US4830978 Dram cell and method
05/16/1989US4830977 Method of making a semiconductor memory device
05/16/1989US4830975 Method of manufacture a primos device
05/16/1989US4830974 !erasable programable read only memory semiconductors
05/16/1989US4830973 Merged complementary bipolar and MOS means and method
05/16/1989US4830972 !semiconductors, ultra-miniature
05/16/1989US4830971 High speed, high density
05/16/1989US4830891 Method for selective deposition of metal thin film
05/16/1989US4830890 Method for forming a deposited film from a gaseous silane compound heated on a substrate and introducing an active species therewith
05/16/1989US4830888 Surface treatment method and apparatus thereof
05/16/1989US4830706 Method of making sloped vias
05/16/1989US4830705 Method for etch of GaAs
05/16/1989US4830703 Single crystal growth apparatus
05/16/1989US4830700 Processing apparatus and method
05/16/1989US4830609 Curing oven system for semiconductor devices
05/16/1989US4830499 Optical device capable of maintaining pupil imaging
05/16/1989US4830264 Method of forming solder terminals for a pinless ceramic module
05/16/1989US4830182 Reticle cassette
05/16/1989US4829666 Method for producing a carrier element for an IC-chip
05/16/1989CA1254261A1 Long life x-ray source target
05/11/1989EP0174954A4 Method for making integrated circuit devices using a layer of indium arsenide as an antireflective coating.
05/11/1989DE3836480A1 Anhaenger bzw. etikett und verfahren zu seiner herstellung Trailers or label and process for its manufacture
05/11/1989DE3737148A1 Process for curing polyimide layers
05/11/1989DE3736341A1 Method for manufacturing strip-shaped silicon crystals by horizontal pulling from the melt
05/10/1989EP0315483A2 Semiconductor memory
05/10/1989EP0315450A2 Pellicle
05/10/1989EP0315422A2 Semiconductor memory device having an ohmic contact between an aluminum-silicon alloy metallization film and a silicon substrate
05/10/1989EP0315421A1 Semiconductor integrated circuit device having at least two contact holes
05/10/1989EP0315398A2 Stacked metal-insulator semiconductor device
05/10/1989EP0315387A2 Method of diffusing Si into compound semiconductor and compound semiconductor device
05/10/1989EP0315375A2 Multilayer resist material and pattern forming method using the same
05/10/1989EP0315350A1 Low temperature intrinsic gettering techniques
05/10/1989EP0315319A2 Liquid crystal display device
05/10/1989EP0315314A1 Silver-glass paste
05/10/1989EP0315229A2 Method of manufacturing a semiconductor device with insulated-gate structure
05/10/1989EP0315170A1 Process for manufacturing silicon wafers
05/10/1989EP0315145A1 Four-layer power semiconductor device
05/10/1989EP0314990A2 Process for preferentially etching polycrystalline silicon
05/10/1989EP0314877A1 Power high election mobility structure
05/10/1989EP0314858A1 Apparatus for the continuous supply of raw material to be melted
05/10/1989EP0314836A1 Semiconductor device in particular a hot electron transistor
05/10/1989EP0314726A1 Process and installation for determining the thickness of layers in layered semi-conductors
05/10/1989EP0314707A1 Wire bonds and electrical contacts of an integrated circuit device.
05/10/1989CN1032884A Method of growth of thin film layer for use in composite semiconductor
05/09/1989US4829482 Current metering apparatus for optimally inducing field emission of electrons in tunneling devices and the like
05/09/1989US4829480 Column redundancy circuit for CMOS dynamic random access memory
05/09/1989US4829444 Charged particle beam lithography system
05/09/1989US4829405 Tape automated bonding package
05/09/1989US4829403 Packaging arrangement for energy dissipating devices
05/09/1989US4829363 Silicon semiconductors
05/09/1989US4829361 Semiconductor device
05/09/1989US4829360 Monolithic integrated semiconductor means to reduce power dissipation of a parasitic transistor
05/09/1989US4829356 Lateral transistor with buried semiconductor zone
05/09/1989US4829351 Polysilicon pattern for a floating gate memory
05/09/1989US4829350 Electrostatic discharge integrated circuit protection
05/09/1989US4829347 Junction field effect transistors
05/09/1989US4829346 High performance and reliability
05/09/1989US4829240 Secondary electron measuring circuit
05/09/1989US4829202 Semiconductor integrated bipolar switching circuit for controlling passage of signals
05/09/1989US4829193 Projection optical apparatus with focusing and alignment of reticle and wafer marks
05/09/1989US4829025 Process for patterning films in manufacture of integrated circuit structures
05/09/1989US4829024 Method of forming layered polysilicon filled contact by doping sensitive endpoint etching
05/09/1989US4829022 Method for forming thin films of compound semiconductors by flow rate modulation epitaxy
05/09/1989US4829021 Group 3 organometallic and group 5 compounds, injection, semiconductors
05/09/1989US4829019 Method for increasing source/drain to channel stop breakdown and decrease P+/N+ encroachment
05/09/1989US4829018 Multilevel integrated circuits employing fused oxide layers
05/09/1989US4829017 Method for lubricating a high capacity dram cell
05/09/1989US4829016 Bipolar transistor by selective and lateral epitaxial overgrowth
05/09/1989US4829015 Method for manufacturing a fully self-adjusted bipolar transistor
05/09/1989US4829014 Discretionary interconnection of acceptable devices only
05/09/1989US4828967 Electronic device and its manufacturing method