Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2005
02/03/2005US20050026379 Polysilicon line having a metal silicide region enabling linewidth scaling
02/03/2005US20050026378 Silicon rich barrier layers for integrated circuit devices
02/03/2005US20050026377 Semiconductor device with silicon-film fins and method of manufacturing the same
02/03/2005US20050026376 Methods for forming shallow trench isolation
02/03/2005US20050026374 Evaporation of Y-Si-O films for medium-K dielectrics
02/03/2005US20050026373 Method for fabricating transistors of different conduction types and having different packing densities in a semiconductor substrate
02/03/2005US20050026372 Vertical transistor and method of making
02/03/2005US20050026371 Horizontal memory devices with vertical gates
02/03/2005US20050026370 Method and composite for decreasing charge leakage
02/03/2005US20050026369 Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction
02/03/2005US20050026368 Method of making the selection gate in a split-gate flash EEPROM cell its and structure
02/03/2005US20050026367 Method of forming an epitaxial layer for raised drain and source regions by removing contaminations
02/03/2005US20050026366 Fabrication of gate dielectric in nonvolatile memories in which a memory cell has multiple floating gates
02/03/2005US20050026365 Nonvolatile memory cell with multiple floating gates formed after the select gate
02/03/2005US20050026364 Fabrication of dielectric for a nonvolatile memory cell having multiple floating gates
02/03/2005US20050026363 Method and structure for vertical dram devices with self-aligned upper trench shaping
02/03/2005US20050026362 Manufacturing method of semiconductor device
02/03/2005US20050026361 Double sided container capacitor for a semiconductor device and method for forming same
02/03/2005US20050026360 Method and structure for high capacitance memory cells
02/03/2005US20050026359 Buried strap contact for a storage capacitor and method for fabricating it
02/03/2005US20050026358 Method for manufacturing semiconductor integrated circuit device
02/03/2005US20050026357 Method to fabricate surface p-channel CMOS
02/03/2005US20050026356 Semiconductor device and method of fabricating the same
02/03/2005US20050026355 Capacitor structures
02/03/2005US20050026352 Formation of standard voltage threshold and low voltge threshold MOSFET devices
02/03/2005US20050026351 Packaging of electronic chips with air-bridge structures
02/03/2005US20050026350 Semiconductor contact device
02/03/2005US20050026349 Flash memory with low tunnel barrier interpoly insulators
02/03/2005US20050026348 Method of composite gate formation
02/03/2005US20050026347 Methods of forming semiconductor logic circuitry, and semiconductor logic circuit constructions
02/03/2005US20050026345 Process for forming dual metal gate structures
02/03/2005US20050026343 Thyistor-based SRAM and method using quasi-planar finfet process for the fabrication thereof
02/03/2005US20050026342 Semiconductor device having improved short channel effects, and method of forming thereof
02/03/2005US20050026341 Method of forming isolation dummy fill structures
02/03/2005US20050026340 Method for fabricating semiconductor device, and electro-optical device, integrated circuit and electronic apparatus including the semiconductor device
02/03/2005US20050026339 Methods of forming semiconductor circuitry, and semiconductor circuit constructions
02/03/2005US20050026338 Semiconductor device having an organic anti-reflective coating (ARC) and method therefor
02/03/2005US20050026337 Thyristor-based sram and method for the fabrication thereof
02/03/2005US20050026336 Current limiting antifuse programming path
02/03/2005US20050026335 Method of fabricating semiconductor device and semiconductor device
02/03/2005US20050026333 Method of fabricating an ultra-narrow channel semiconductor device
02/03/2005US20050026332 Techniques for curvature control in power transistor devices
02/03/2005US20050026330 Conductive block mounting process for electrical connection
02/03/2005US20050026329 Semiconductor device for applying well bias and method of fabricating the same
02/03/2005US20050026328 Process for manufacturing semiconductor device
02/03/2005US20050026327 Semiconductor integrated circuit package having electrically disconnected solder balls for mounting
02/03/2005US20050026326 Manufacturing method of semiconductor device
02/03/2005US20050026324 Rotating gripper wafer flipper
02/03/2005US20050026323 Method of manufacturing a semiconductor device
02/03/2005US20050026322 Ideal operational amplifier layout techniques for reducing package stress and configurations therefor
02/03/2005US20050026320 Manufacturing method for semiconductor device
02/03/2005US20050026319 Semiconductor laser device, optical pickup using the same, and apparatus and method for manufacturing the same
02/03/2005US20050026317 Inkjet-fabricated integrated circuits
02/03/2005US20050026314 Method of manufacturing semiconductor device
02/03/2005US20050026313 Method and apparatus for manufacturing a device having a moveable structure
02/03/2005US20050026312 Method for producing and testing a corrosion-resistant channel in a silicon device
02/03/2005US20050026310 Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing
02/03/2005US20050026309 [method of increasing cell retention capacity of silicon nitride read-only-memory cell]
02/03/2005US20050026307 Spin injection devices
02/03/2005US20050026205 Method of polishing metal and metal/dielectric structures
02/03/2005US20050026090 Method for high aspect ratio pattern transfer
02/03/2005US20050026087 Controlling wavelength for etching photomask; antireflectivity layer; stabilization of photoresist pattern over layer to be etched ; photolithography
02/03/2005US20050026085 Multilayer; electroconductive layer, dielectrics, antireflectivity layer; forming photoresist pattern; dry etching using photoresist pattern as mask
02/03/2005US20050026084 Photoresist layer for pattening a semiconductor; exposure a semiconductor to fluorine
02/03/2005US20050026080 Forming patterns upon exposure to ultraviolet radiation light sources
02/03/2005US20050026078 Forming photoresists by photolithography; fine pattern
02/03/2005US20050026077 Forming relief images; for ((opto)electronics; photoresists; mixture of binder and photoactivable compound
02/03/2005US20050026074 Positive resist composition
02/03/2005US20050026073 Positive resist composition and method of forming resist pattern using the same
02/03/2005US20050026054 Measurement reflection, calibration data
02/03/2005US20050026045 consists of a mask barrier and a set of contact barriers; mask barrier surrounds a mask formed on a reticle, while the contact barriers are affixed between the mask and contact spots on a reticle
02/03/2005US20050025943 Injection moulded product and a method for its manufacture
02/03/2005US20050025942 Method of bonding semiconductor devices
02/03/2005US20050025909 Method for the production of III-V laser components
02/03/2005US20050025892 Mixture of aromatic resin and heat decomposition compound; applying; heat treatment
02/03/2005US20050025691 Method for heat treatment of silicon wafers and silicon wafer
02/03/2005US20050025681 Producing quality photovoltaic cells; irradiation assisted thermal infiltration into semiconductor wafer
02/03/2005US20050025654 Substrate material for mounting a semiconductor device, substrate for mounting a semiconductor device, semiconductor device, and method of producing the same
02/03/2005US20050025353 Inspection apparatus and inspection method
02/03/2005US20050025352 Position detecting method
02/03/2005US20050025351 Method for inspecting a defect in a photomask, method for manufacturing a semiconductor device and method for producing a photomask
02/03/2005US20050025279 Non absorbing reticle and method of making same
02/03/2005US20050025205 Nitride semiconductor laser device
02/03/2005US20050024979 Metal-insulator-metal capacitor and interconnecting structure
02/03/2005US20050024974 Semiconductor memory device
02/03/2005US20050024973 Current limiting antifuse programming path
02/03/2005US20050024961 Nonvolatile memory cells with buried channel transistors
02/03/2005US20050024958 Power supply device
02/03/2005US20050024950 Readout circuit for semiconductor storage device
02/03/2005US20050024949 Semiconductor integrated circuit device
02/03/2005US20050024935 Thin film magnetic memory device reducing a charging time of a data line in a data read operation
02/03/2005US20050024930 Magnetic memory device having yoke layer, and manufacturing method thereof
02/03/2005US20050024929 Junction-isolated depletion mode ferroelectric memory devices
02/03/2005US20050024921 Horizontal memory devices with vertical gates
02/03/2005US20050024920 Junction-isolated depletion mode ferroelectric memory devices
02/03/2005US20050024919 Junction-isolated depletion mode ferroelectric memory devices
02/03/2005US20050024918 Junction-isolated depletion mode ferroelectric memory devices
02/03/2005US20050024917 Semiconductor memory device with memory cells operated by boosted voltage
02/03/2005US20050024915 Ferroelectric random access memory
02/03/2005US20050024910 Embedded ROM device using substrate leakage
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