Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2005
02/03/2005WO2004083495A3 Ultra low k (ulk) sicoh film and method
02/03/2005WO2004077530A3 Titanium carboxylate films for use in semiconductor processing
02/03/2005WO2004075252A8 Surface modification of silicon nitride for thick film silver metallization of solar cell
02/03/2005WO2004068617A3 Trench mosfet technology for dc-dc converter applications
02/03/2005WO2004068555A3 Repair and restoration of damaged dielectric materials and films
02/03/2005WO2004061859A3 Stochastic assembly of sublithographic nanoscale interfaces
02/03/2005WO2004045267A3 Improved microscale vacuum tube device and method for making same
02/03/2005WO2003101695A3 Machining apparatus and methods
02/03/2005WO2003063248A8 Semiconductor die package with semiconductor die having side electrical connection
02/03/2005WO2003028048A3 Low-force electrochemical mechanical processing method and apparatus
02/03/2005WO2002020876A3 Segmenting of processing system into wet and dry areas
02/03/2005US20050028129 Method, program product and apparatus of simultaneous optimization for NA-Sigma exposure settings and scattering bars OPC using a device layout
02/03/2005US20050028125 Layout method for miniaturized memory array area
02/03/2005US20050028116 Method of HDL simulation considering hard macro core with negative setup/hold time
02/03/2005US20050027490 Device for calculating the quantity of light and method thereof
02/03/2005US20050027481 System for making semiconductor devices and processing control thereof
02/03/2005US20050027476 Method for detecting and monitoring defects
02/03/2005US20050027387 Substrate processing apparatus and substrate processing method
02/03/2005US20050027089 solvent comprising one or more members selected from the group consisting of xylene, anisole, decalin, cyclohexane, cyclohexene, methylcyclohexane, ethylcyclohexane, limonene, hexane, octane, nonane, decane, hydrocarbons; semiconductor
02/03/2005US20050026714 Golf club head with customizable center of gravity
02/03/2005US20050026552 Porous polyurethane polishing pads
02/03/2005US20050026543 Apparatus and method for chemical mechanical polishing process
02/03/2005US20050026542 Detection system for chemical-mechanical planarization tool
02/03/2005US20050026461 Method for fabricating semiconductor device and semiconductor substrate
02/03/2005US20050026460 Optimized temperature controller for cold mass introduction
02/03/2005US20050026459 Method of forming uniform ultra-thin oxynitride layers
02/03/2005US20050026458 Methods of forming hafnium-containing materials, methods of forming hafnium oxide, and constructions comprising hafnium oxide
02/03/2005US20050026457 Method for forming a localized region of a material difficult to etch
02/03/2005US20050026456 Film forming method, film forming apparatus, pattern forming method, and manufacturing method of semiconductor apparatus
02/03/2005US20050026455 Substrate processing apparatus and substrate processing method
02/03/2005US20050026454 Film forming method and film forming apparatus
02/03/2005US20050026453 Formation of ultra-thin oxide layers by self-limiting interfacial oxidation
02/03/2005US20050026452 Etching method for manufacturing semiconductor device
02/03/2005US20050026451 Precise patterning of high-k films
02/03/2005US20050026450 Inhibition of tin oxide formation in lead free interconnect formation
02/03/2005US20050026448 Device for liquid treatment of wafer-shaped articles
02/03/2005US20050026447 Segmented cold plate for rapid thermal processing (RTP) tool for conduction cooling
02/03/2005US20050026446 Dual damascene interconnecting line structure and fabrication method thereof
02/03/2005US20050026445 Method of fabricating metal interconnection of semiconductor device
02/03/2005US20050026444 Slurry and method for chemical-mechanical planarization of copper
02/03/2005US20050026443 Method for forming a silicon oxide layer using spin-on glass
02/03/2005US20050026442 Method of chemical mechanical polishing with high throughput and low dishing
02/03/2005US20050026441 Abrasive used for planarization of semiconductor device and method of manufacturing semiconductor device using the abrasive
02/03/2005US20050026440 Anisotropic etch method
02/03/2005US20050026439 Semiconductor device fabrication method
02/03/2005US20050026438 Semiconductor processing methods
02/03/2005US20050026437 Abrasive free formulations for chemical mechanical polishing of copper and associated materials and method of using same
02/03/2005US20050026435 Process sequence for photoresist stripping and/or cleaning of photomasks for integrated circuit manufacturing
02/03/2005US20050026434 Method of improving the wafer-to-wafer thickness uniformity of silicon nitride layers
02/03/2005US20050026432 Wafer bonded epitaxial templates for silicon heterostructures
02/03/2005US20050026431 LSI device etching method and apparatus thereof
02/03/2005US20050026430 Selective etching of carbon-doped low-k dielectrics
02/03/2005US20050026429 Method and apparatus for providing an integrated active region on silicon-on-insulator devices
02/03/2005US20050026428 Method of manufacturing semiconductor device and semiconductor device manufactured using the same
02/03/2005US20050026427 Custom electrodes for molecular memory and logic devices
02/03/2005US20050026426 Method for producing a high quality useful layer on a substrate
02/03/2005US20050026425 Semiconductor device manufacturing method
02/03/2005US20050026424 Fabrication method of semiconductor integrated circuit device
02/03/2005US20050026423 Method for fabricating semiconductor device and display device
02/03/2005US20050026422 Method of forming an insulating structure having an insulating interlayer and a capping layer and method of forming a metal wiring structure using the same
02/03/2005US20050026421 Method of forming multilayer interconnection structure, method of manufacturing circuit board, and method of manufacturing device
02/03/2005US20050026420 Method of manufacturing a semiconductor device using a polysilicon etching mask
02/03/2005US20050026419 Method of forming multilayer interconnection structure, and manufacturing method for multilayer wiring boards
02/03/2005US20050026418 Method of manufacturing semiconductor device
02/03/2005US20050026417 Process for fabricating a semiconductor component and semiconductor component
02/03/2005US20050026416 Encapsulated pin structure for improved reliability of wafer
02/03/2005US20050026415 Fabrication of stacked microelectronic devices
02/03/2005US20050026414 Methods for consolidating previously unconsolidated conductive material to form conductive structures or contact pads or secure conductive structures to contact pads
02/03/2005US20050026413 Method of fabricating cylindrical bonding structure
02/03/2005US20050026412 Interconnect line selectively isolated from an underlying contact plug
02/03/2005US20050026411 Electrode manufacturing method
02/03/2005US20050026410 Method of manufacturing semiconductor device and display device
02/03/2005US20050026409 Method for forming DRAM cell bit line and bit line contact structure
02/03/2005US20050026408 Preventing silicide formation at the gate electrode in a replacement metal gate technology
02/03/2005US20050026407 Process for producing a plurality of gate stacks which are approximately the same height and equidistant on a semiconductor substrate
02/03/2005US20050026406 Method for fabricating poly patterns
02/03/2005US20050026405 Semiconductor integrated circuit device
02/03/2005US20050026404 Method and apparatus for non-aggressive plasma-enhanced vapor deposition of dielectric films
02/03/2005US20050026403 Method for slowing down dopant-enhanced diffusion in substrates and devices fabricated therefrom
02/03/2005US20050026402 Method and device for depositing crystalline layers on crystalline substrates
02/03/2005US20050026401 Method for manufacturing semiconductor device, and laser irradiation apparatus
02/03/2005US20050026400 Methods for depositing amorphous materials and using them as templates for epitaxial films by solid phase epitaxy
02/03/2005US20050026398 Method of making group III nitride-based compound semiconductor
02/03/2005US20050026397 Crack stop for low k dielectrics
02/03/2005US20050026396 Method of etching substrates
02/03/2005US20050026395 Fabrication of stacked microelectronic devices
02/03/2005US20050026394 Methods for fabricating a substrate
02/03/2005US20050026393 Method for fabricating semiconductor device
02/03/2005US20050026392 Method for depositing III-V semiconductor layers on a non-III-V substrate
02/03/2005US20050026391 Preventive treatment method for a multilayer semiconductor structure
02/03/2005US20050026390 Shallow trench filled with two or more dielectrics for isolation and coupling or for stress control
02/03/2005US20050026389 Method for the fabrication of isolation structures
02/03/2005US20050026388 Techniques to create low K ILD for BEOL
02/03/2005US20050026386 Ultrathin leadframe BGA circuit package
02/03/2005US20050026385 Method for manufacturing a semiconductor device and semiconductor device with overlay mark
02/03/2005US20050026384 Method for fabricating trench capacitor with insulation collar electrically connected to substrate through buried contact, in particular, for a semiconductor memory cell
02/03/2005US20050026383 Embedded electrically programmable read only memory devices
02/03/2005US20050026382 Method and structure for improved trench processing
02/03/2005US20050026381 Bipolar transistors with low-resistance emitter contacts
02/03/2005US20050026380 Technique for forming recessed sidewall spacers for a polysilicon line
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