Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2005
08/04/2005US20050170658 Methods for preparing ball grid array substrates via use of a laser
08/04/2005US20050170657 Method of forming nanostructure
08/04/2005US20050170656 Vertical integration of a MEMS structure with electronics in a hermetically sealed cavity
08/04/2005US20050170654 Manufacturing method for compound semiconductor device
08/04/2005US20050170653 Semiconductor manufacturing method and apparatus
08/04/2005US20050170652 Method for manufacturing wiring substrate and method for manufacturing electronic device
08/04/2005US20050170651 Semiconductor manufacturing apparatus
08/04/2005US20050170650 Electroless palladium nitrate activation prior to cobalt-alloy deposition
08/04/2005US20050170648 Method to solve via poisoning for porous low-k dielectric
08/04/2005US20050170647 Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
08/04/2005US20050170646 Use of multiple etching steps to reduce lateral etch undercut
08/04/2005US20050170645 Metal plating using seed film
08/04/2005US20050170644 Resistance dividing circuit and manufacturing method thereof
08/04/2005US20050170643 Forming method of contact hole, and manufacturing method of semiconductor device, liquid crystal display device and EL display device
08/04/2005US20050170642 Methods for improving metal-to-metal contact in a via, devices made according to the methods, and systems including the same
08/04/2005US20050170641 Multilayered wiring structure, method of forming buried wiring, semiconductor device, method of manufacturing semiconductor device, semiconductor mounted device, and method of manufacturing semiconductor mounted device
08/04/2005US20050170640 Semiconductor device, wiring substrate forming method, and substrate processing apparatus
08/04/2005US20050170639 Forming a semiconductor device
08/04/2005US20050170638 Method for forming dual damascene interconnect structure
08/04/2005US20050170637 Fabrication method for making a planar cantilever, low surface leakage, reproducible and reliable metal dimple contact micro-relay mems switch
08/04/2005US20050170636 Production method of semiconductor device
08/04/2005US20050170635 Semiconductor device and manufacturing method thereof
08/04/2005US20050170634 High performance system-on-chip discrete components using post passivation process
08/04/2005US20050170633 Semiconductor device and method of manufacturing a semiconductor device
08/04/2005US20050170632 Methods of manufacturing multi-level metal lines in semiconductor devices
08/04/2005US20050170631 Manufacturing method for wiring substrates
08/04/2005US20050170630 Methods for reducing flip chip stress
08/04/2005US20050170629 Method of fabricating a low cost zener diode chip for use in shunt-wired miniature light strings
08/04/2005US20050170628 Forming a contact in a thin-film device
08/04/2005US20050170627 Interconnect apparatus, system, and method
08/04/2005US20050170626 Semiconductor device and method for fabricating the device
08/04/2005US20050170625 Novel method to control dual damascene trench etch profile and trench depth uniformity
08/04/2005US20050170624 Method for manufacturing gate structure with sides of its metal layer partially removed
08/04/2005US20050170623 Transistor fabrication methods
08/04/2005US20050170620 Transistors for semiconductor device and methods of fabricating the same
08/04/2005US20050170619 Method of forming a semi-insulating region
08/04/2005US20050170618 Manufacturing method of semiconductor film and image display device
08/04/2005US20050170617 Film formation method and apparatus for semiconductor process
08/04/2005US20050170616 Wafer dividing method
08/04/2005US20050170615 Method of manufacturing a semiconductor device having an alignment mark
08/04/2005US20050170613 Wafer dividing method
08/04/2005US20050170612 Substrate attaching method
08/04/2005US20050170611 Recycling of a wafer comprising a multi-layer structure after taking-off a thin layer
08/04/2005US20050170610 Low defect density, ideal oxygen precipitating silicon
08/04/2005US20050170608 Semiconductor device and, manufacturing method thereof
08/04/2005US20050170607 Method for manufacturing semiconductor device
08/04/2005US20050170606 Method of achieving improved STI gap fill with reduced stress
08/04/2005US20050170605 Airdome enclosure for components
08/04/2005US20050170604 Method for forming a semiconductor device with local semiconductor-on-insulator (SOI)
08/04/2005US20050170603 Method for forming a capacitor for use in a semiconductor device
08/04/2005US20050170602 Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment
08/04/2005US20050170601 Methods of forming dielectric structures and capacitors
08/04/2005US20050170600 Three-dimensional semiconductor package, and spacer chip used therein
08/04/2005US20050170599 Multiple stacked capacitors formed within an opening with thick capacitor dielectric
08/04/2005US20050170598 Silicided amorphous polysilicon - metal capacitor
08/04/2005US20050170597 Semiconductor apparatus and method of manufacturing the same
08/04/2005US20050170596 Semiconductor device and method for manufacturing the same
08/04/2005US20050170595 Semiconductor device layout and channeling implant process
08/04/2005US20050170594 Strained-channel transistor structure with lattice-mismatched zone and fabrication method thereof
08/04/2005US20050170593 Method for forming a FinFET by a damascene process
08/04/2005US20050170592 Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same
08/04/2005US20050170591 Method for making a semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
08/04/2005US20050170590 Method for making a semiconductor device including a superlattice with regions defining a semiconductor junction
08/04/2005US20050170589 Method for forming mask ROM
08/04/2005US20050170588 Method for forming multi-level mask ROM cell and NAND multi-level mask ROM
08/04/2005US20050170587 Power MOSFET semiconductor device and method of manufacturing the same
08/04/2005US20050170586 Method of manufacturing non-volatile DRAM
08/04/2005US20050170585 Methods for manufacturing semiconductor memory devices using sidewall spacers
08/04/2005US20050170583 Methods of fabricating MIM capacitors of semiconductor devices
08/04/2005US20050170582 Semiconductor device and its manufacturing method
08/04/2005US20050170581 Method for forming bottle shaped trench
08/04/2005US20050170580 Double polysilicon bipolar transistor
08/04/2005US20050170579 Flash memory cell, flash memory cell array and manufacturing method thereof
08/04/2005US20050170578 Use of pedestals to fabricate contact openings
08/04/2005US20050170577 Strained silicon layer fabrication with reduced dislocation defect density
08/04/2005US20050170576 Transistor with reduced short channel effects and method
08/04/2005US20050170575 Method of fabricating a dual gate oxide
08/04/2005US20050170574 Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof
08/04/2005US20050170573 Semiconductor device and method of manufacturing the same
08/04/2005US20050170572 Laser annealing apparatus and annealing method of semiconductor thin film using the same
08/04/2005US20050170571 Method of producing active semiconductor layers of different thicknesses in an SOI wafer
08/04/2005US20050170570 High electrical quality buried oxide in simox
08/04/2005US20050170569 Apparatus for manufacturing flat panel display devices
08/04/2005US20050170568 Isotropic polycrystalline silicon
08/04/2005US20050170567 Laser irradiation apparatus and method of fabricating a semiconductor device
08/04/2005US20050170566 Thin film structure, capacitor, and methods for forming the same
08/04/2005US20050170565 Forming method of contact hole, and manufacturing method of semicondutor device, liquid crystal display device and EL display device
08/04/2005US20050170564 Thin film tansistor array panel and fabricating method thereof
08/04/2005US20050170563 Method for end point detection of polysilicon chemical mechanical polishing in an anti-fuse memory device
08/04/2005US20050170561 Fabrication method of semiconductor package with photosensitive chip
08/04/2005US20050170560 Method of manufacturing an electronic device
08/04/2005US20050170559 Mounting and dicing process for wafers
08/04/2005US20050170556 Compliant wirebond pedestal
08/04/2005US20050170555 Method of manufacturing a semiconductor device including electrodes on main and reverse sides of a semiconductor chip
08/04/2005US20050170554 Multi-layer inductor formed in a semiconductor substrate and having a core of ferromagnetic material
08/04/2005US20050170553 Apparatus for controlled alignment of catalytically grown nanostructures
08/04/2005US20050170549 Method of fabricating optoelectronic integrated circuit chip
08/04/2005US20050170545 Optimized transistor for imager device
08/04/2005US20050170544 Method for manufacturing MEMS structures
08/04/2005US20050170543 Substrate treating method and production method for semiconductor device