Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2005
08/04/2005WO2005071752A1 Gradient deposition of low-k cvd materials
08/04/2005WO2005071750A2 Conductive material compositions, apparatus, systems, and methods
08/04/2005WO2005071745A1 Laminated electronic part and its manufacturing method
08/04/2005WO2005071742A1 Multilayer electronic component manufacturing method
08/04/2005WO2005071740A2 Limited thermal budget formation of pre-metal dielectric layers
08/04/2005WO2005071739A2 Plasma-excited chemical vapor deposition method, silicon/oxygen/nitrogen-containing material and layered assembly
08/04/2005WO2005071738A2 Shallow trench isolation process and structure
08/04/2005WO2005071737A1 Integrated circuit comprising laterally dielectrically isolated active regions above an electrically contacted buried material, and method for producing the same
08/04/2005WO2005071736A1 Substrate holding device
08/04/2005WO2005071735A1 Joining method and device produced by this method and joining unit
08/04/2005WO2005071734A1 Compression device
08/04/2005WO2005071733A1 Semiconductor device, power converter employing it, motor employing it, hybrid automobile employing it, and motor drive system employing it
08/04/2005WO2005071732A1 Carrier for electronic components and methods for encapsulating and separating an electronic component
08/04/2005WO2005071731A1 Electronic component manufacturing method
08/04/2005WO2005071730A1 Tri-gate transistors and mehtods to fabricate same
08/04/2005WO2005071729A1 Low stress sidewall spacer in integrated circuit technology
08/04/2005WO2005071728A1 Method of fabricating a strained finfet channel
08/04/2005WO2005071727A1 Narrow-body damascene tri-gate finfet having thinned body
08/04/2005WO2005071726A1 Damascene tri-gate finfet
08/04/2005WO2005071725A1 Method of fabricating a mono-crystalline emitter
08/04/2005WO2005071724A1 A method of trimming a gate electrode structure
08/04/2005WO2005071723A1 Method for manufacturing semiconductor device and substrate processing system
08/04/2005WO2005071722A1 Selective etch of films with high dielectric constant
08/04/2005WO2005071721A1 Plasma etching process
08/04/2005WO2005071720A1 Group iii nitride semiconductor multilayer structure
08/04/2005WO2005071719A1 Methods for deposition of semiconductor material
08/04/2005WO2005071717A1 Exposure apparatus and device producing method
08/04/2005WO2005071716A2 Method of correction for wafer crystal cut error in semiconductor processing
08/04/2005WO2005071715A2 Nanotube fabrication basis
08/04/2005WO2005071608A1 Id label, id card, and id tag
08/04/2005WO2005071607A1 Film-like article and method for manufacturing the same
08/04/2005WO2005071523A1 Voltage regulator circuit arrangement
08/04/2005WO2005071490A1 Positive resist composition and method of forming resist pattern
08/04/2005WO2005071478A1 Electric appliance, semiconductor device, and method for manufacturing the same
08/04/2005WO2005071144A1 Method for predicting precipitation behavior of oxygen in silicon single crystal, method for determining production parameter of silicon single crystal, and storage medium storing program for predicting precipitation behavior of oxygen in silicon single crystal
08/04/2005WO2005071138A1 Method for processing substrate, catalyst process liquid, and substrate processing apparatus
08/04/2005WO2005070851A1 Non oxide ceramic having oxide layer on the surface thereof, method for production thereof and use thereof
08/04/2005WO2005070643A1 Photopolymeric and/or polymeric encapsulation in integrated circuits with direct soldering and the respective process to obtain it
08/04/2005WO2005070619A1 Method of grinding wafer and wafer
08/04/2005WO2005070603A1 Repair soldering head having a supply channel for a heat transfer medium and a return channel for said heat transfer medium, and the use thereof
08/04/2005WO2005070178A2 Test result marking of electronic packages
08/04/2005WO2005070009A2 Enhancement mode iii-nitride fet
08/04/2005WO2005070007A2 Iii-nitride current control device and method of manufacture
08/04/2005WO2005069828A2 Thermal protection for electronic components during processing
08/04/2005WO2005061752A3 Method for patterning films
08/04/2005WO2005059973A3 Controlled growth of gallium nitride nanostructures
08/04/2005WO2005059971A3 Active matrix pixel device with photo sensor
08/04/2005WO2005057654A3 Wire-bonded semiconductor component with reinforced inner connection metallization
08/04/2005WO2005040952A3 Power system inhibit method and device and structure therefor
08/04/2005WO2005034212A3 6t finfet cmos sram cell with an increased cell ratio
08/04/2005WO2005034173A3 Standard tray carrier for aligning trays
08/04/2005WO2005033720A3 Testing apparatus and method for determining an etch bias associated with a semiconductor-processing step
08/04/2005WO2005024936B1 Support for vertically-oriented capacitors during the formation of a semiconductor device
08/04/2005WO2005022608A3 Siliciding spacer in integrated circuit technology
08/04/2005WO2005020296A3 Uniform gas cushion wafer support
08/04/2005WO2005019495A3 Control system for a sputtering system
08/04/2005WO2005013335A3 Method of depositing patterned films of materials using a positive imaging process
08/04/2005WO2005013325B1 System for processing a treatment object
08/04/2005WO2005006362A3 Methods for the control of flatness and electron mobility of diamond coated silicon and structures formed thereby
08/04/2005WO2005001933A3 Multichip semi-conductor component and method for the production thereof
08/04/2005WO2004114365A3 Lost cost chip carrier manufactured from conductive loaded resin-based material
08/04/2005WO2004109756A3 Method and system for using ion implantation for treating a low-k dielectric film
08/04/2005WO2004077512B1 Universal substrate holder for treating objects in fluids
08/04/2005WO2004065934A8 Semiconductor fabrication method for making small features
08/04/2005WO2003036734A3 Magnetoresistance effect element, magetic memory element, magnetic memory device, and their manufacturing method
08/04/2005WO2002004715A3 Deposition uniformity control for electroplating apparatus, and associated method
08/04/2005US20050172256 Mask set for measuring an overlapping error and method of measuring an overlapping error using the same
08/04/2005US20050172254 Method and apparatus for supporting designing of LSI, and computer product
08/04/2005US20050172253 Automatic placement and routing device, method for placement and routing of semiconductor device, semiconductor device and manufacturing method of the same
08/04/2005US20050172249 Pattern generation on a semiconductor surface
08/04/2005US20050172248 Area ratio/occupancy ratio verification method and pattern generation method
08/04/2005US20050172244 Method and apparatus for optimizing distributed multiplexed bus interconnects
08/04/2005US20050172192 Scan based automatic test pattern generation (ATPG) test circuit, test method using the test circuit, and scan chain reordering method
08/04/2005US20050172189 Test method for a semiconductor integrated circuit having a multi-cycle path and a semiconductor integrated circuit
08/04/2005US20050171702 Method and apparatus for determining chemistry of part's residual contamination
08/04/2005US20050171627 Method and apparatus for monitoring tool performance
08/04/2005US20050171591 Catherter tip
08/04/2005US20050171301 Reworkable thermosetting resin compositions
08/04/2005US20050171226 Radiation sensitive resin composition
08/04/2005US20050170980 Converting hydrophobic wafer surface hydrophilic to enhance particle removal after chemical mechanical polishing; aqueous fatty alcohol surfactant rinse step followed by high pressure deionized water washing
08/04/2005US20050170971 P-type zinc oxide semiconductor film and process for preparation thereof
08/04/2005US20050170760 Polishing apparatus
08/04/2005US20050170759 Differential planarization
08/04/2005US20050170757 Grooved polishing pad and method
08/04/2005US20050170750 Polish pad to change polish rate on wafer by adjusting groove width and density
08/04/2005US20050170749 Process for producing a semiconductor wafer
08/04/2005US20050170748 Lens made of a crystalline material
08/04/2005US20050170738 Cold cathode field emission device and process for the production thereof, and cold cathode field emission display and process for the production thereof
08/04/2005US20050170670 Patterning of sacrificial materials
08/04/2005US20050170669 Plasma processing method and apparatus
08/04/2005US20050170668 Plasma chemical vapor deposition system and method for coating both sides of substrate
08/04/2005US20050170667 Nanolaminate film atomic layer deposition method
08/04/2005US20050170666 Semiconductor device and manufacturing method of the same
08/04/2005US20050170665 Method of forming a high dielectric film
08/04/2005US20050170664 Manufacturing method for strained silicon wafer
08/04/2005US20050170663 He treatment to improve low-K adhesion property
08/04/2005US20050170662 Method and apparatus for processing semiconductor substrates
08/04/2005US20050170661 Method of forming a trench structure
08/04/2005US20050170660 Method of depositing a layer of a material on a substrate
08/04/2005US20050170659 Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch