Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2006
05/09/2006US7042083 Package substrate and a flip chip mounted semiconductor device
05/09/2006US7042081 Semiconductor device having heat dissipation layer
05/09/2006US7042079 Variable rotational assignment of interconnect levels in integrated circuit fabrication
05/09/2006US7042077 Integrated circuit package with low modulus layer and capacitor/interposer
05/09/2006US7042075 Electronic device sealed under vacuum containing a getter and method of operation
05/09/2006US7042074 Power semiconductor module and method for producing it
05/09/2006US7042072 Semiconductor package and method of manufacturing the same which reduces warpage
05/09/2006US7042071 Leadframe, plastic-encapsulated semiconductor device, and method for fabricating the same
05/09/2006US7042069 Semiconductor device and method of manufacturing same, wiring board, electronic module, and electronic instrument
05/09/2006US7042066 Dual-trench isolated crosspoint memory array
05/09/2006US7042064 Integrated circuit with a MOS capacitor
05/09/2006US7042063 Semiconductor wafer, semiconductor device, and process for manufacturing the semiconductor device
05/09/2006US7042062 Device isolation structures of semiconductor devices and manufacturing methods thereof
05/09/2006US7042059 Optical semiconductor device and method for manufacturing optical semiconductor device
05/09/2006US7042057 Process for creating metal-insulator-metal devices
05/09/2006US7042055 Semiconductor device and manufacturing thereof
05/09/2006US7042054 SONOS structure including a deuterated oxide-silicon interface and method for making the same
05/09/2006US7042052 Transistor constructions and electronic devices
05/09/2006US7042051 Semiconductor device including impurity layer having a plurality of impurity peaks formed beneath the channel region
05/09/2006US7042050 Semiconductor device having MOSFET with offset-spacer, and manufacturing method thereof
05/09/2006US7042049 Composite etching stop in semiconductor process integration
05/09/2006US7042048 Semiconductor device and a method of manufacturing the same
05/09/2006US7042047 Memory cell, array, device and system with overlapping buried digit line and active area and method for forming same
05/09/2006US7042046 Super-junction semiconductor device and method of manufacturing the same
05/09/2006US7042045 Non-volatile memory cell having a silicon-oxide nitride-oxide-silicon gate structure
05/09/2006US7042044 Nor-type channel-program channel-erase contactless flash memory on SOI
05/09/2006US7042043 Programmable array logic or memory devices with asymmetrical tunnel barriers
05/09/2006US7042042 Integrated circuit capacitors having a dielectric layer between a U-shaped lower electrode and a support layer
05/09/2006US7042041 Semiconductor device
05/09/2006US7042040 Semiconductor device and method for manufacturing the same
05/09/2006US7042039 Integrated memory circuit for storing a binary datum in a memory cell
05/09/2006US7042038 Semiconductor integrated circuit device and manufacturing method thereof
05/09/2006US7042034 Capacitor
05/09/2006US7042033 ULSI MOS with high dielectric constant gate insulator
05/09/2006US7042030 High density memory array
05/09/2006US7042027 Gated lateral thyristor-based random access memory cell (GLTRAM)
05/09/2006US7042025 Method and structure for contacting an overlying electrode for a magnetoelectronics element
05/09/2006US7042024 Light emitting apparatus and method for manufacturing the same
05/09/2006US7042023 Semiconductor light emitting device and method for producing the same
05/09/2006US7042010 Intermediate semiconductor device having activated oxide-based layer for electroless plating
05/09/2006US7042009 High mobility tri-gate devices and methods of fabrication
05/09/2006US7042007 Semiconductor device and method for evaluating characteristics of the same
05/09/2006US7042006 Micro-electronic junctions devices containing same
05/09/2006US7041996 Method of aligning a substrate, a computer program, a device manufacturing method and a device manufactured thereby
05/09/2006US7041991 Variably shaped beam EB writing system
05/09/2006US7041990 Apparatus for monitoring ion-implantation input parameter in semiconductor fabricating devices and monitoring method thereof
05/09/2006US7041989 Lithographic apparatus and device manufacturing method
05/09/2006US7041981 Image sensor and manufacturing method thereof
05/09/2006US7041939 Thermal processing apparatus and thermal processing method
05/09/2006US7041931 Stepped reflector plate
05/09/2006US7041771 Encapsulant with fluxing properties and method of use in flip-chip surface mount reflow soldering
05/09/2006US7041748 Polysilsesquioxane has acid-sensitive imageable groups; acid generator or a crosslinking agent; crosslinkable after exposing to light; photoresists, ladder polymers; film stacks
05/09/2006US7041736 decreasing the volatilization thereby reducing porosity in cured underfills; electronic components
05/09/2006US7041611 Enhancement of fabrication yields of nanomechanical devices by thin film deposition
05/09/2006US7041610 Method and apparatus for the thermal treatment of substrates
05/09/2006US7041609 Systems and methods for forming metal oxides using alcohols
05/09/2006US7041608 Providing fluorocarbon layers on conductive electrodes in making electronic devices such as OLED devices
05/09/2006US7041607 Method for fabricating crystalline-dielectric thin films and devices formed using same
05/09/2006US7041606 Electroless deposition of doped noble metals and noble metal alloys
05/09/2006US7041605 Semiconductor contact structure and method of forming the same
05/09/2006US7041604 Method of patterning surfaces while providing greater control of recess anisotropy
05/09/2006US7041603 Method for producing magnetic memory device
05/09/2006US7041602 Method of fabricating semiconductor device
05/09/2006US7041601 Method of manufacturing metal gate MOSFET with strained channel
05/09/2006US7041600 Methods of planarization
05/09/2006US7041599 High through-put Cu CMP with significantly reduced erosion and dishing
05/09/2006US7041598 Directional ion etching process for patterning self-aligned via contacts
05/09/2006US7041597 Semiconductor device having void free contact and method for fabricating the contact
05/09/2006US7041596 Surface treatment using iodine plasma to improve metal deposition
05/09/2006US7041595 Method of forming a barrier seed layer with graded nitrogen composition
05/09/2006US7041594 Semiconductor device for applying well bias and method of fabricating the same
05/09/2006US7041593 Method for manufacturing thin-film structure
05/09/2006US7041592 Method for forming a metal interconnection layer of a semiconductor device using a modified dual damascene process
05/09/2006US7041591 Method for fabricating semiconductor package substrate with plated metal layer over conductive pad
05/09/2006US7041590 Formation method for conductive bump
05/09/2006US7041589 Metal bump with an insulating sidewall and method of fabricating thereof
05/09/2006US7041588 Method for producing smooth indium-tin-oxide layers on substrates and a substrate coating of indium-tin-oxide
05/09/2006US7041586 Semiconductor device having a multilayer interconnection structure
05/09/2006US7041585 Process for producing an integrated electronic component
05/09/2006US7041584 Method of manufacturing semiconductor device and the semiconductor device
05/09/2006US7041583 Method of removing features using an improved removal process in the fabrication of a semiconductor device
05/09/2006US7041582 Method of manufacturing semiconductor device
05/09/2006US7041581 Method and structure for improving latch-up immunity using non-dopant implants
05/09/2006US7041580 Laser annealing method and laser annealing device
05/09/2006US7041579 Hard substrate wafer sawing process
05/09/2006US7041578 Method for reducing stress concentrations on a semiconductor wafer by surface laser treatment including the backside
05/09/2006US7041577 Process for manufacturing a substrate and associated substrate
05/09/2006US7041576 Separately strained N-channel and P-channel transistors
05/09/2006US7041575 Localized strained semiconductor on insulator
05/09/2006US7041574 Composite intermetal dielectric structure including low-k dielectric material
05/09/2006US7041573 Method for fabricating semiconductor device having trench isolation
05/09/2006US7041572 Fabrication method for a deep trench isolation structure of a high-voltage device
05/09/2006US7041571 Air gap interconnect structure and method of manufacture
05/09/2006US7041570 Method of forming a capacitor
05/09/2006US7041569 Method for fabricating a high density composite MIM capacitor with reduced voltage dependence in semiconductor dies
05/09/2006US7041568 Method for the production of a self-adjusted structure on a semiconductor wafer
05/09/2006US7041567 Isolation structure for trench capacitors and fabrication method thereof
05/09/2006US7041566 Method for forming inductor in semiconductor device
05/09/2006US7041565 Method for fabricating a capacitor in a semiconductor device
05/09/2006US7041564 Method for fabricating a self-aligned bipolar transistor