Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2010
05/06/2010US20100111762 Integrated bio-chip, method of fabricating the integrated bio-chip, and apparatus for detecting bio-material
05/06/2010US20100111651 Tactile Wafer Lifter and Methods for Operating the Same
05/06/2010US20100111650 Automatic substrate loading station
05/06/2010US20100111649 Transfer device and vacuum processing apparatus using the same
05/06/2010US20100111648 Substrate processing apparatus and particle adhesion preventing method
05/06/2010US20100111473 Method and System For Coupling Optical Signals Into Silicon Optoelectronic Chips
05/06/2010US20100111130 Semiconductor laser device and method of manufacturing the same
05/06/2010US20100111128 SELECTIVE AREA METAL BONDING Si-BASED LASER
05/06/2010US20100111125 Vertical-cavity surface-emitting laser diode (vcsel), method for fabricating vcsel, and optical transmission apparatus
05/06/2010US20100110759 Programmable resistive memory cell with filament placement structure
05/06/2010US20100110753 Ferroelectric Memory Cell Arrays and Method of Operating the Same
05/06/2010US20100110752 Method of making a diode read/write memory cell in a programmed state
05/06/2010US20100110746 Memory cell with alignment structure
05/06/2010US20100110659 Led lighting unit and method for manufacturing the same
05/06/2010US20100110651 Integrated Circuit Coating For Improved Thermal Isolation
05/06/2010US20100110607 Vertical capacitors and method of fabricating same
05/06/2010US20100110605 Electrostatic chuck assembly for plasma reactor
05/06/2010US20100110604 Electrostatic chuck ground punch
05/06/2010US20100110603 Wafer grounding method for electrostatic clamps
05/06/2010US20100110528 Special optical modulation array device and a method of fabricating the same
05/06/2010US20100110527 Thermal conduction by encapsulation
05/06/2010US20100110356 Method of fabricating liquid crystal display panels having various sizes
05/06/2010US20100110323 Array substrate of lcd with wide viewing angle and method for manufacturing the same
05/06/2010US20100110271 Solid-state imaging device, method for manufacturing the same, and electronic apparatus
05/06/2010US20100110157 Transfer method of functional region, led array, led printer head, and led printer
05/06/2010US20100110145 Heater stack and method for making heater stack with heater element decoupled from substrate
05/06/2010US20100109695 Chuck for holding a device under test
05/06/2010US20100109673 Heat-resistant lens kit
05/06/2010US20100109645 Nanostructure sensors
05/06/2010US20100109568 Common optical element for an array of phosphor converted llight emitting devices
05/06/2010US20100109446 Semiconductor circuit device and data processing system
05/06/2010US20100109169 Semiconductor package and method of making the same
05/06/2010US20100109164 Stacked integrated circuit package fabrication methods that use vias formed and filled after stacking, and related stacked integrated circuit package structures
05/06/2010US20100109163 Semiconductor device and manufacturing method thereof
05/06/2010US20100109162 High Integrated Semiconductor Memory Device
05/06/2010US20100109161 Reducing metal voids in a metallization layer stack of a semiconductor device by providing a dielectric barrier layer
05/06/2010US20100109160 Semiconductor device and method of manufacturing the same
05/06/2010US20100109158 Semiconductor device including a reduced stress configuration for metal pillars
05/06/2010US20100109156 Back side protective structure for a semiconductor package
05/06/2010US20100109155 Reliable interconnect integration
05/06/2010US20100109154 Semiconductor device and method for manufacturing the semiconductor device
05/06/2010US20100109150 Method of assembly of a semiconductor package for the improvement of the electrical testing yield on the packages so obtained
05/06/2010US20100109147 Less expensive high power plastic surface mount package
05/06/2010US20100109145 Sealed ball grid array package
05/06/2010US20100109134 Pre-molded, clip-bonded multi-die semiconductor package
05/06/2010US20100109132 Chip package and manufacturing method thereof
05/06/2010US20100109131 Reduced wafer warpage in semiconductors by stress engineering in the metallization system
05/06/2010US20100109130 Method of forming an oxide thin film
05/06/2010US20100109129 Wafer level buck converter
05/06/2010US20100109128 Crack Deflector Structure for Improving Semiconductor Device Robustness Against Saw-Induced Damage
05/06/2010US20100109126 Methods of forming layers of semiconductor material having reduced lattice strain, semiconductor structures, devices and engineered substrates including same
05/06/2010US20100109123 Method of Constructing Inductors and Transformers
05/06/2010US20100109122 Method to reduce metal fuse thickness without extra mask
05/06/2010US20100109115 Virtual IC wafers and bonding of constitutent IC films
05/06/2010US20100109113 Semiconductor device and method for manufacturing the same
05/06/2010US20100109107 Magnetic stack design with decreased substrate stress
05/06/2010US20100109106 High density spin-transfer torque MRAM process
05/06/2010US20100109105 Component and method for its manufacture
05/06/2010US20100109104 Pressure sensor and wire guide assembly
05/06/2010US20100109102 Method and structure for forming a gyroscope and accelerometer
05/06/2010US20100109101 Method of Positioning Catalyst Nanoparticle and Nanowire-Based Device Employing Same
05/06/2010US20100109099 Semiconductor device and manufacturing method thereof
05/06/2010US20100109098 Gate structure including modified high-k gate dielectric and metal gate interface
05/06/2010US20100109097 Integrated circuit system employing an elevated drain
05/06/2010US20100109095 Method for fabricating a dual work function semiconductor device and the device made thereof
05/06/2010US20100109092 Monolithically integrated circuit
05/06/2010US20100109091 Recessed drain and source areas in combination with advanced silicide formation in transistors
05/06/2010US20100109090 cmos latch-up immunity
05/06/2010US20100109088 Balance step-height selective bi-channel structure on hkmg devices
05/06/2010US20100109087 Multichannel Metal Oxide Semiconductor (MOS) Transistors
05/06/2010US20100109086 Method of Fabricating A Fin Field Effect Transistor (FinFET) Device
05/06/2010US20100109085 Memory device design
05/06/2010US20100109084 Semiconductor Device and Method for Fabricating the Same
05/06/2010US20100109083 Semiconductor Device and Method for Manufacturing the Same
05/06/2010US20100109078 Semiconductor device and method of forming a semiconductor device
05/06/2010US20100109077 High-voltage vertical transistor with a multi-gradient drain doping profile
05/06/2010US20100109076 Structures for electrostatic discharge protection
05/06/2010US20100109075 Semiconductor device having an expanded storage node contact and method for fabricating the same
05/06/2010US20100109073 Flash memory device and method for manufacturing the same
05/06/2010US20100109072 Nonvolatile semiconductor memory device and method for manufacturing same
05/06/2010US20100109070 Fabricating method of mirror bit memory device having split ono film with top oxide film formed by oxidation process
05/06/2010US20100109069 Nonvolatile semiconductor storage device and method of manufacture thereof
05/06/2010US20100109067 SiH4 soak for low hydrogen SiN deposition to improve flash memory device performance
05/06/2010US20100109064 Semiconductor device and manufacturing method thereof
05/06/2010US20100109059 Semiconductor device and a method of manufacturing the same, and solid-state image pickup device using the same
05/06/2010US20100109057 Fin field effect transistor and method of fabricating the same
05/06/2010US20100109056 Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods
05/06/2010US20100109054 Pattern formation in semiconductor fabrication
05/06/2010US20100109053 Semiconductor device having integrated circuit with pads coupled by external connecting component and method for modifying integrated circuit
05/06/2010US20100109052 Semiconductor device and manufacturing method thereof
05/06/2010US20100109048 Method and structure for forming strained si for cmos devices
05/06/2010US20100109046 Methods of forming low interface resistance contacts and structures formed thereby
05/06/2010US20100109045 Integrated circuit system employing stress-engineered layers
05/06/2010US20100109044 Optimized Compressive SiGe Channel PMOS Transistor with Engineered Ge Profile and Optimized Silicon Cap Layer
05/06/2010US20100109037 Fluorescer solution, light-emitting device, and method for manufacturing same
05/06/2010US20100109035 Compound semiconductor light emitting device and method for manufacturing the same
05/06/2010US20100109034 Led with molded bi-directional optics
05/06/2010US20100109033 Cavity Glass for Light-Emissive Devices and a Method of Manufacturing the Same
05/06/2010US20100109026 Light emitting device and method of manufacturing the same
05/06/2010US20100109025 Over the mold phosphor lens for an led
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