Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2010
11/18/2010US20100289135 Semiconductor chip package
11/18/2010US20100289134 Integrated circuit packaging system with reinforced encapsulant having embedded interconnect and method of manufacture thereof
11/18/2010US20100289133 Stackable Package Having Embedded Interposer and Method for Making the Same
11/18/2010US20100289131 Semiconductor Device and Method of Forming Overlapping Semiconductor Die with Coplanar Vertical Interconnect Structure
11/18/2010US20100289130 Method and Apparatus for Vertical Stacking of Integrated Circuit Chips
11/18/2010US20100289129 Copper plate bonding for high performance semiconductor packaging
11/18/2010US20100289128 Integrated circuit packaging system with leads and transposer and method of manufacture thereof
11/18/2010US20100289126 Semiconductor Device and Method of Forming a 3D Inductor from Prefabricated Pillar Frame
11/18/2010US20100289125 Enhanced electromigration performance of copper lines in metallization systems of semiconductor devices by surface alloying
11/18/2010US20100289124 Printable Semiconductor Structures and Related Methods of Making and Assembling
11/18/2010US20100289123 Method for making a semi-conducting substrate located on an insulation layer
11/18/2010US20100289122 Iii-v nitride substrate boule and method of making and using the same
11/18/2010US20100289115 Soi substrate and method for manufacturing soi substrate
11/18/2010US20100289114 Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ doped semiconductor material
11/18/2010US20100289113 Fabrication process of a hybrid semiconductor substrate
11/18/2010US20100289109 Schottky diodes containing high barrier metal islands in a low barrier metal layer and methods of forming the same
11/18/2010US20100289108 Silicon dioxide cantilever support and method for silicon etched structures
11/18/2010US20100289106 Photodiode with interfacial charge control and associated process
11/18/2010US20100289097 Integrated Microphone
11/18/2010US20100289095 Semiconductor device
11/18/2010US20100289094 Enhancing deposition uniformity of a channel semiconductor alloy by an in situ etch process
11/18/2010US20100289093 Semiconductor device and method for fabricating the same
11/18/2010US20100289091 Semiconductor device and method of manufacturing the same
11/18/2010US20100289090 Enhancing uniformity of a channel semiconductor alloy by forming sti structures after the growth process
11/18/2010US20100289089 Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization
11/18/2010US20100289088 Threshold voltage improvement employing fluorine implantation and adjustment oxide layer
11/18/2010US20100289087 Semiconductor device and method of manufacturing a semiconductor device
11/18/2010US20100289085 Asymmetric Semiconductor Devices and Method of Fabricating
11/18/2010US20100289083 Multi-step deposition of a spacer material for reducing void formation in a dielectric material of a contact level of a semiconductor device
11/18/2010US20100289082 Isolation with offset deep well implants
11/18/2010US20100289081 Reduced silicon thickness of n-channel transistors in soi cmos devices
11/18/2010US20100289080 Semiconductor device comprising metal gates and a silicon containing resistor formed on an isolation structure
11/18/2010US20100289079 High-voltage soi mos device structure and method of fabrication
11/18/2010US20100289078 Semiconductor device and method for manufacturing the same
11/18/2010US20100289075 Semiconductor device having integrated mosfet and schottky diode and manufacturing method thereof
11/18/2010US20100289074 Semiconductor device and method of fabricating the same
11/18/2010US20100289073 Trench MOSFETS with ESD Zener diode
11/18/2010US20100289063 Epitaxial solid-state semiconducting heterostructures and method for making same
11/18/2010US20100289060 Method of fabricating free-form, high-aspect ratio components for high-current, high-speed microelectronics
11/18/2010US20100289058 Lateral bipolar junction transistor
11/18/2010US20100289057 Integrated circuits using guard rings for esd, systems, and methods for forming the integrated circuits
11/18/2010US20100289055 Silicone leaded chip carrier
11/18/2010US20100289053 Semiconductor light emitting element and method of manufacturing the same, and semiconductor element and method of manufacturing the same
11/18/2010US20100289051 Chip coated light emitting diode package and manufacturing method thereof
11/18/2010US20100289046 Light emitting device and method for manufacturing same
11/18/2010US20100289043 High light extraction efficiency light emitting diode (led) through multiple extractors
11/18/2010US20100289040 Light emitting diode and method of fabricating the same
11/18/2010US20100289037 Semiconductor device, manufacturing method thereof and display device
11/18/2010US20100289034 Method for forming lens, method for manufacturing semiconductor apparatus, and electronic information device
11/18/2010US20100289032 Diffused junction termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same
11/18/2010US20100289030 Diamond semiconductor element and process for producing the same
11/18/2010US20100289029 Epitaxial substrate for semiconductor device, semiconductor device, and method of manufacturing epitaxial substrate for semiconductor device
11/18/2010US20100289028 Electronic device, display device, interface circuit and differential amplification device, which are constituted by using thin-film transistors
11/18/2010US20100289027 Electronic device, display device, interface circuit and differential amplification device, which are constituted by using thin-film transistors
11/18/2010US20100289025 Thin film transistor array substrate, display panel comprising the same, and method for manufacturing thin film transistor array substrate
11/18/2010US20100289024 Insulating Thin Film, Formation Solution For Insulating Thin Film, Field-Effect Transistor, Method For Manufacturing The Same And Image Display Unit
11/18/2010US20100289023 Array substrate for dislay device and method of fabricating the same
11/18/2010US20100289022 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method
11/18/2010US20100289021 Scribe line structure and method for dicing a wafer
11/18/2010US20100289020 Field effect transistor using oxide semicondutor and method for manufacturing the same
11/18/2010US20100289019 Patterning devices using fluorinated compounds
11/18/2010US20100289005 Amorphous multi-component metallic thin films for electronic devices
11/18/2010US20100289003 Making colloidal ternary nanocrystals
11/18/2010US20100289000 Light-emitting diode and manufacturing method of the same
11/18/2010US20100288996 Memory arrays including memory levels that share conductors, and methods of forming such memory arrays
11/18/2010US20100288995 Semiconductor memory device and method of manufacturing the same
11/18/2010US20100288994 Method of forming memory cell using gas cluster ion beams
11/18/2010US20100288993 Phase change random access memory for actively removing residual heat and method of manufacturing the same
11/18/2010US20100288439 Top plate and plasma process apparatus employing the same
11/18/2010US20100288358 Reacted particle deposition (rpd) method for forming a compound semi-conductor thin-film
11/18/2010US20100288355 Silicon nitride diffusion barrier layer for cadmium stannate tco
11/18/2010US20100288354 Cadmium stannate tco structure with diffusion barrier layer and separation layer
11/18/2010US20100288335 Degradation-resistant photovoltaic devices
11/18/2010US20100288330 Process for the manufacture of solar cells
11/18/2010US20100288184 Silicon single crystal wafer for igbt and method for manufacturing silicon single crystal wafer for igbt
11/18/2010US20100288048 Electronic pressure-sensing device
11/18/2010DE112006001735B4 Blockkontaktarchitekturen für Transistoren mit Kanälen in einer Nano-Größenordnung und Verfahren zum Ausbilden Contact block architectures for transistors with channels in a nano-scale and method of forming
11/18/2010DE112005002428B4 Verfahren zur Herstellung von Doppelgate- und Trigate-Transistoren mit unabhängigem Zugriff in demselben Prozeßfluß sowie eine diese umfassende integrierte Schaltung Process for the preparation of Doppelgate- and tri-gate transistors with independent access to the same process flow as well as a comprehensive, integrated circuit this
11/18/2010DE102010018579A1 Housing for integrated circuit, comprises semiconductor chip with one or multiple electric contacts, and z-axis interconnection with matrix of electrically conductive elements
11/18/2010DE102010015903A1 Ausrichtung eines rekonfigurierten Wafers Orientation of a reconfigured wafer
11/18/2010DE102010015739A1 Laserstrahlbearbeitungsvorrichtung Laser beam machining apparatus
11/18/2010DE102010005625A1 Herstellungsverfahren einer Siliciumcarbid-Halbleitervorrichtung Method of manufacturing a silicon carbide semiconductor device
11/18/2010DE102009041026B3 Contacting device for contacting object with fluid, has two fluid lines that have wall of concavity flow into indentation
11/18/2010DE102009022900A1 Optoelektronisches Bauelement und Verfahren zu dessen Herstellung Optoelectronic component and process for its preparation
11/18/2010DE102009021489A1 Erhöhen der Abscheidegleichmäßigkeit für eine Halbleiterlegierung durch einen in-situ-Ätzprozess Increasing the Abscheidegleichmäßigkeit for a semiconductor alloy by an in situ etching process
11/18/2010DE102009021487A1 Halbleiterelement, das in einem kristallinen Substratmaterial aufgebaut ist und ein eingebettetes in-situ-dotiertes Halbleitermaterial aufweist A semiconductor element, which is constructed in a crystalline substrate material and an embedded in-situ-doped semiconductor material
11/18/2010DE102009021486A1 Einstellen der Schwellwertspannung für komplexe Transistoren durch Diffusion in einem dielektrischen Gatedeckschichtmaterial vor der Stabilisierung des Gatedielektrikumsstapels Setting the threshold voltage of transistors by complex diffusion in a gate dielectric cover layer material prior to stabilization of the Gatedielektrikumsstapels
11/18/2010DE102009021485A1 Halbleiterbauelement mit Metallgate und einem siliziumenthaltenden Widerstand, der auf einer Isolationsstruktur gebildet ist A semiconductor device comprising a silicon-containing and metal gate resistor, which is formed on an isolation structure
11/18/2010DE102009021480A1 Reduzierte Siliziumdicke in n-Kanaltransistoren in SOI-CMOS Bauelementen Reduced silicon thickness in n-channel transistors in SOI CMOS devices
11/18/2010DE102009021241A1 Hochvolt-Transistor mit vergrabener Driftstrecke und Herstellungsverfahren High-voltage transistor with buried drift and manufacturing processes
11/18/2010DE102009020733A1 Verfahren zur Kontaktsinterung von bandförmigen Kontaktelementen Method for Kontaktsinterung of band-shaped contact elements
11/18/2010DE102009018156A1 Vorrichtung und Verfahren zum Trennen eines Substrats von einem Trägersubstrat Device and method for separating a substrate from a carrier substrate
11/18/2010DE102009015718A1 Testsystem und Verfahren zum Verringern der Schäden in Saatschichten in Metallisierungssystem von Halbleiterbauelementen Test system and method for reducing the damage to seed layers in metallization of semiconductor components
11/18/2010DE102007061527B4 Integrierter Schaltkreis und Verfahren zum Herstellen eines integrierten Schaltkreises Integrated circuit and method of fabricating an integrated circuit
11/18/2010DE102004045492B4 Ätzverfahren zur Herstellung einer Halbleitervorrichtung mit einer unteren Kondensatorelektrode Etching process of manufacturing a semiconductor device with a lower capacitor electrode
11/18/2010DE102004029094B4 Verfahren zum Herstellen eines Halbleiterchips A method of manufacturing a semiconductor chip
11/18/2010DE102004021157B4 Dünnschichttransistor-Arraysubstrat und Verfahren zum Herstellen desselben Of the same thin film transistor array substrate and methods for making
11/18/2010DE102004009141B4 Speicherzelle mit Grabentransistor-Gate zum Erzielen eines großen, selbst ausgerichteten offenen Kontaktspielraums und Verfahren zur Herstellung derselben Memory cell with grave transistor gate for obtaining a large self-aligned contact open latitude and process for producing same
11/18/2010CA2761872A1 Pecvd coating using an organosilicon precursor
11/18/2010CA2761473A1 Semiconductor device