Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2010
11/16/2010US7833896 Aluminum cap for reducing scratch and wire-bond bridging of bond pads
11/16/2010US7833895 TSVS having chemically exposed TSV tips for integrated circuit devices
11/16/2010US7833894 Devices and systems having at least one dam structure
11/16/2010US7833893 Method for forming conductive structures
11/16/2010US7833892 Method of forming a field effect transistor
11/16/2010US7833891 Semiconductor device manufacturing method using oxygen diffusion barrier layer between buried oxide layer and high K dielectric layer
11/16/2010US7833890 Semiconductor device having a pair of fins and method of manufacturing the same
11/16/2010US7833889 Apparatus and methods for improving multi-gate device performance
11/16/2010US7833888 Integrated circuit system employing grain size enlargement
11/16/2010US7833887 Notched-base spacer profile for non-planar transistors
11/16/2010US7833886 Method of producing a semiconductor element in a substrate
11/16/2010US7833885 Microcrystalline silicon thin film transistor
11/16/2010US7833884 Strained semiconductor-on-insulator by Si:C combined with porous process
11/16/2010US7833883 Precursor gas mixture for depositing an epitaxial carbon-doped silicon film
11/16/2010US7833882 Method of producing a semiconductor device by forming an oxide film on a resin layer
11/16/2010US7833881 Methods for fabricating semiconductor components and packaged semiconductor components
11/16/2010US7833880 Process for manufacturing micromechanical devices containing a getter material and devices so manufactured
11/16/2010US7833879 Low temperature hermetic bonding at water level and method of bonding for micro display application
11/16/2010US7833878 Method for manufacturing SOI substrate
11/16/2010US7833877 Method for producing a semiconductor substrate
11/16/2010US7833876 Semiconductor device having multiple element formation regions and manufacturing method thereof
11/16/2010US7833875 Semiconductor device and method of fabricating the same
11/16/2010US7833874 Technique for forming an isolation trench as a stress source for strain engineering
11/16/2010US7833873 Method and structure to reduce contact resistance on thin silicon-on-insulator device
11/16/2010US7833872 Uniform recess of a material in a trench independent of incoming topography
11/16/2010US7833871 Laser annealing method and device
11/16/2010US7833870 Method for fabricating semiconductor device having recessed gate electrode and self-aligning stacked contact structures
11/16/2010US7833869 Methods for forming a transistor
11/16/2010US7833868 Method for fabricating a semiconductor device having recessed gate electrode and elevated source and drain regions
11/16/2010US7833867 Semiconductor device and method for manufacturing the same
11/16/2010US7833866 Manufacture of semiconductor device
11/16/2010US7833864 Method of doping polysilicon layer that utilizes gate insulation layer to prevent diffusion of ion implanted impurities into underlying semiconductor substrate
11/16/2010US7833863 Method of manufacturing a closed cell trench MOSFET
11/16/2010US7833862 Semiconductor device and method for forming same
11/16/2010US7833861 Semiconductor device having recess channel structure and method for manufacturing the same
11/16/2010US7833860 Recessed gate dielectric antifuse
11/16/2010US7833859 Method for simultaneously manufacturing semiconductor devices
11/16/2010US7833857 ESD protecting circuit and manufacturing method thereof
11/16/2010US7833856 Semiconductor device and method of manufacturing same
11/16/2010US7833855 Methods of producing integrated circuit devices utilizing tantalum amine derivatives
11/16/2010US7833854 Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices
11/16/2010US7833853 Method of defining gate structure height for semiconductor devices
11/16/2010US7833852 Source/drain stressors formed using in-situ epitaxial growth
11/16/2010US7833851 Semiconductor device and manufacturing method thereof
11/16/2010US7833850 Corrosion of electrodes and wires effectively prevented by fluorination of the edges of a spaced-apart source electrode and drain electrode to form copper fluoride layers; etching the exposed copper semiconductor layer with chlorine gas; etching resistance; corrosion resistance
11/16/2010US7833849 Method of fabricating a semiconductor structure including one device region having a metal gate electrode located atop a thinned polygate electrode
11/16/2010US7833848 Method for removing hard masks on gates in semiconductor manufacturing process
11/16/2010US7833847 Method of forming semiconductor device having stacked transistors
11/16/2010US7833846 Array substrate and method of fabricating the same
11/16/2010US7833845 Manufacturing method of semiconductor device
11/16/2010US7833844 Semiconductor device and production method of the same
11/16/2010US7833843 Method for forming a memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
11/16/2010US7833842 Mixed-scale electronic interface
11/16/2010US7833841 Semiconductor apparatus and method for manufacturing the same
11/16/2010US7833840 Integrated circuit package system with down-set die pad and method of manufacture thereof
11/16/2010US7833839 Method for decreasing surface delamination of gel-type thermal interface material by management of the material cure temperature
11/16/2010US7833838 Method and apparatus for increasing the immunity of new generation microprocessors from ESD events
11/16/2010US7833837 Chip scale package and method for manufacturing the same
11/16/2010US7833836 Stack MCP and manufacturing method thereof
11/16/2010US7833835 Multi-layer fin wiring interposer fabrication process
11/16/2010US7833834 Method for producing nitride semiconductor laser light source and apparatus for producing nitride semiconductor laser light source
11/16/2010US7833833 Method of manufacturing a semiconductor device
11/16/2010US7833832 Method of fabricating semiconductor components with through interconnects
11/16/2010US7833831 Method of manufacturing an electronic component and an electronic device
11/16/2010US7833830 3D interconnect with protruding contacts
11/16/2010US7833829 MEMS devices and methods of assembling micro electromechanical systems (MEMS)
11/16/2010US7833828 Method of fabricating a patterned device using sacrificial spacer layer
11/16/2010US7833826 Film formation method, thin-film transistor and solar battery
11/16/2010US7833825 Solution-based deposition process for metal chalcogenides
11/16/2010US7833824 Multilevel phase change memory
11/16/2010US7833823 Programmable resistance memory element and method for making same
11/16/2010US7833822 Method for making PMC type memory cells
11/16/2010US7833821 Method and apparatus for thin film solar cell manufacturing
11/16/2010US7833819 Method and apparatus for decreasing storage node parasitic charge in active pixel image sensors
11/16/2010US7833818 Integrated structure of MEMS device and CMOS image sensor device and fabricating method thereof
11/16/2010US7833817 Fabricating method of image sensor
11/16/2010US7833816 Forming a thin film thermoelectric cooler and structures formed thereby
11/16/2010US7833815 Microelectromechanical system package and the method for manufacturing the same
11/16/2010US7833814 Method of forming pinned photodiode (PPD) pixel with high shutter rejection ratio for snapshot operating CMOS sensor
11/16/2010US7833813 Thin film transistor array panel and method of manufacturing the same
11/16/2010US7833812 organic semiconducting material between the anode and the cathode and an electron transport layer between the cathode and the organic semiconducting material wherein the organic semiconducting material comprises sulfur
11/16/2010US7833810 Method of fabricating isolation structures for CMOS image sensor chip scale packages
11/16/2010US7833809 Light emitting diode, optoelectronic device and method of fabricating the same
11/16/2010US7833808 Methods for forming multiple-layer electrode structures for silicon photovoltaic cells
11/16/2010US7833807 Method of manufacturing semiconductor laser for communication, semiconductor laser for communication and optical transmission module
11/16/2010US7833806 Structure and method for fabricating cladded conductive lines in magnetic memories
11/16/2010US7833681 thin films that form masking patterns, formed on substrates and a chemically amplified photoresist film, having a protective film that prevents movement of substances that inhibits chemical amplification of the photoresist films
11/16/2010US7833612 Substrate for inkjet printing and method of manufacturing the same
11/16/2010US7833587 in which discharge electrode and substrate are disposed opposite each other in vacuum film formation chamber into which gas for forming film containing substance has been introduced, and high-frequency electric power generated by feeding circuit through adjustable external cables
11/16/2010US7833572 Method and apparatus for dispensing a viscous material on a substrate
11/16/2010US7833456 Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece
11/16/2010US7833431 Aqueous dispersion for CMP, polishing method and method for manufacturing semiconductor device
11/16/2010US7833429 Plasma processing method
11/16/2010US7833427 Electron beam etching device and method
11/16/2010US7833405 doped areas are first selectively anodized (porous etching), which is carried out locally by means of a monocrystalline cover layer, e.g., an epitaxial layer, followed by a time-controlled switch to selective electropolishing of doped layer buried under the membrane to produce a cavity under cover layer
11/16/2010US7833393 Semiconductor wafer holder and electroplating system for plating a semiconductor wafer
11/16/2010US7833387 Thin film patterning; metal film is formed on side wall of sputtering target to prevent bonding agent from being exposed
11/16/2010US7833382 Vacuum processing apparatus
11/16/2010US7833352 Apparatus for fabrication of thin films
11/16/2010US7833351 Batch processing platform for ALD and CVD
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