Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
10/1998
10/22/1998WO1998047147A1 Sense amplifier for low read-voltage memory cells
10/21/1998EP0872849A1 Memory read circuit with precharge limitation arrangement
10/21/1998EP0872848A1 Memory read circuit with dynamically controlled precharge arrangement
10/21/1998EP0872847A1 Memory
10/21/1998EP0871956A1 Method and apparatus for a low power self-timed memory control system
10/21/1998EP0728360A4 Single transistor per cell eeprom memory device with bit line sector page programming
10/20/1998US5826056 Synchronous memory device and method of reading data from same
10/20/1998US5825715 Method and apparatus for preventing write operations in a memory device
10/20/1998US5825714 Semiconductor memory device having noise killer circuit
10/20/1998US5825713 Dual port memory device and a method therefor
10/20/1998US5825711 Method and system for storing and processing multiple memory addresses
10/20/1998US5825710 Synchronous semiconductor memory device
10/20/1998US5825709 Semiconductor memory device
10/20/1998US5825704 High performance embedded semiconductor memory devices with multiple dimension first-level bit lines
10/20/1998US5825702 Synchronous storage device and method of reading out data from the same
10/20/1998US5825701 Memory cell arrangement of memory cells arranged in the form of a matrix
10/20/1998US5825699 Semiconductor memory device fixing defective memory cell selection line replaced with spare memory cell selection line in non-selected state
10/20/1998US5825693 Write control circuit for semiconductor memory
10/20/1998US5825691 Circuit and method for terminating a write to a memory cell
10/20/1998US5825683 Folded read-only memory
10/20/1998US5825235 Multiplexer for semiconductor memory device
10/20/1998US5825215 Output buffer circuit
10/20/1998US5825212 High speed single ended bit line sense amplifier
10/20/1998US5825198 Semiconductor integrated circuits with power reduction mechanism
10/20/1998US5824571 Multi-layered contacting for securing integrated circuits
10/15/1998WO1998045844A1 Device and method for recording an information signal in a recording carrier
10/15/1998DE19751268A1 DRAM semi-direct data read-out circuit
10/14/1998EP0870303A1 High performance universal multi-port internally cached dynamic random access memory system, architecture and method
10/14/1998EP0870241A1 Protocol for communication with dynamic memory
10/14/1998CN1195865A Sensing circuit
10/14/1998CN1195864A Semiconductor memory having signal input circuit of synchronous type
10/14/1998CN1195848A Memory read method and circuit for error checking and correction in decoding device
10/13/1998USRE35921 Dynamic video RAM incorporating single clock random port control
10/13/1998US5822789 Video memory arrangement
10/13/1998US5822772 Memory controller and method of memory access sequence recordering that eliminates page miss and row miss penalties
10/13/1998US5822270 Circuit for generating internal column address suitable for burst mode
10/13/1998US5822268 Hierarchical column select line architecture for multi-bank DRAMs
10/13/1998US5822267 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
10/13/1998US5822266 Apparatus and method for minimizing DRAM recharge time
10/13/1998US5822262 Apparatus and method for a dynamic random access memory data sensing architecture
10/13/1998US5822261 Semiconductor memory device with increased bandwidth
10/13/1998US5822260 Semiconductor memory device
10/13/1998US5822258 Circuit and method for testing a memory device with a cell plate generator having a variable current
10/13/1998US5822254 Synchronous semiconductor memory device
10/13/1998US5822245 Dual buffer flash memory architecture with multiple operating modes
10/13/1998US5822238 Semiconductor memory
10/13/1998US5822051 Line amplifier for static RAM memory
10/13/1998US5821792 Current differential amplifier circuit
10/13/1998US5821777 Current amplifier and data bus circuit
10/08/1998WO1998043797A1 Molded body of thermoplastic resin having sound absorption characteristics
10/07/1998EP0869617A1 Pad input select circuit for use with bond options
10/07/1998EP0869508A2 Microcomputer capable of suppressing power consumption even if a program memory is increased in capacity
10/07/1998EP0869507A2 Low power memory including selective precharge circuit
10/07/1998EP0869506A1 Memory device with reduced power dissipation
10/07/1998EP0868725A2 Method of operating an sram mos transistor storage cell
10/07/1998CN1195175A Pipelined fast-access floating gate memory architecture and method of operation
10/07/1998CN1195138A Byte write capability for memory array
10/06/1998US5819305 Method and apparatus for configuring operating modes in a memory
10/06/1998US5819076 Memory controller with low skew control signal
10/06/1998US5818886 Pulse synchronizing module
10/06/1998US5818810 Image reader system
10/06/1998US5818794 Internally controlled signal system for controlling the operation of a device
10/06/1998US5818793 Clock-synchronous semiconductor memory device
10/06/1998US5818789 Device and method for memory access
10/06/1998US5818788 Circuit technique for logic integrated DRAM with SIMD architecture and a method for controlling low-power, high-speed and highly reliable operation
10/06/1998US5818787 Semiconductor memory device
10/06/1998US5818786 Layout method of semiconductor memory and content-addressable memory
10/06/1998US5818785 Semiconductor memory device having a plurality of banks
10/06/1998US5818784 Semiconductor memory device and memory system
10/06/1998US5818783 Automatic mode selection circuit for semiconductor memory device
10/06/1998US5818782 Data transmission circuit, data line driving circuit, amplifying circuit, semiconductor integrated circuit, and semiconductor memory
10/06/1998US5818776 Semiconductor memory device and method of reading data therefrom
10/06/1998US5818774 Apparatus and method for a data path implemented using non-differential, current mode techniques
10/06/1998US5818773 Semiconductor storage device
10/06/1998US5818771 Semiconductor memory device
10/06/1998US5818770 Circuit and method for write recovery control
10/06/1998US5818769 Dynamically variable digital delay line
10/06/1998US5818768 Operation mode setting circuit in semiconductor device
10/06/1998US5818767 Wire control circuit and method
10/06/1998US5818765 Semiconductor memory device having auxiliary memory
10/06/1998US5818266 Data transmission circuit for a semiconductor memory device
10/01/1998DE19735137C1 Data content of memory cells analysing circuit for DRAM
09/1998
09/30/1998EP0867884A2 Digital audio recorder and player with address backup function
09/30/1998EP0867883A2 Definition of a pipelining memory stage by generating a delayed transition detection pulse
09/30/1998EP0867068A1 Delay circuit and memory using the same
09/30/1998EP0867026A1 Low voltage dynamic memory
09/30/1998CN1194715A 数据存储装置 Data storage means
09/30/1998CN1194714A Audio Storing and reproducing apparatus
09/29/1998US5815509 Method and system for testing memory
09/29/1998US5815463 Flexible time write operation
09/29/1998US5815462 Synchronous semiconductor memory device and synchronous memory module
09/29/1998US5815460 Memory circuit sequentially accessible by arbitrary address
09/29/1998US5815456 Multibank -- multiport memories and systems and methods using the same
09/29/1998US5815454 Semiconductor memory device having power line arranged in a meshed shape
09/29/1998US5815452 High-speed asynchronous memory with current-sensing sense amplifiers
09/29/1998US5815450 Semiconductor memory device
09/29/1998US5815448 Semiconductor memory having redundancy circuit
09/29/1998US5815444 Serial access system semiconductor storage device capable of reducing access time and consumption current
09/29/1998US5815442 Data transfer apparatus with large noise margin and reduced power dissipation
09/29/1998US5815440 Semiconductor memory device with electrically controllable threshold voltage