Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
04/2005
04/21/2005US20050083755 Flash memory system and method
04/21/2005US20050083751 Semiconductor integrated circuit device
04/21/2005US20050083749 Method for SAN-based BOS install volume group
04/21/2005US20050083748 Magnetic memory having a calibration system
04/21/2005US20050083747 Reference generator for multilevel nonlinear resistivity memory storage elements
04/21/2005US20050083746 Sense amplifier circuit to write data at high speed in high speed semiconductor memory
04/21/2005US20050083743 Nonvolatile sequential machines
04/21/2005US20050083737 Non-volatile semiconductor memory device with memory transistor
04/21/2005US20050083104 Method of operation in a system having a memory device having an adjustable output voltage setting
04/21/2005US20050083099 Capture clock generator using master and slave delay locked loops
04/21/2005US20050083088 Resetable control circuit devices for sense amplifiers
04/21/2005US20050082612 Semiconductor integrated circuit device and sense amplifier of memory
04/21/2005DE10320793B4 Latch or phase detector circuit for DRAM data storage uses flip flop stage and cascaded NAND gates to give output depending on clock and data state change phase
04/21/2005DE10065785B4 Halbleiterspeichervorrichtung A semiconductor memory device
04/20/2005EP1524671A2 Clock suspending circuitry
04/20/2005EP1524647A2 Polarity inversion method for active matrix display apparatus
04/20/2005EP1523712A2 A system, apparatus, and method for a flexible dram architecture
04/20/2005CN2694433Y Digital music player
04/20/2005CN1607608A 半导体存储器件 A semiconductor memory device
04/19/2005US6882593 Adjustable clock driver circuit
04/19/2005US6882591 Synchronous controlled, self-timed local SRAM block
04/19/2005US6882587 Method of preparing to test a capacitor
04/19/2005US6882586 Semiconductor memory device equipped with control circuit for controlling memory cell array in non-normal operation mode
04/19/2005US6882584 Method for operating a semiconductor memory, and semiconductor memory
04/19/2005US6882583 Method and apparatus for implementing DRAM redundancy fuse latches using SRAM
04/19/2005US6882580 Memory devices having power supply routing for delay locked loops that counteracts power noise effects
04/19/2005US6882579 Memory device and method having data path with multiple prefetch I/O configurations
04/19/2005US6882577 On-system programmable and off-system programmable chip
04/19/2005US6882570 Power detecting circuit and method for stable power-on reading of flash memory device using the same
04/19/2005US6882568 Memory system with improved efficiency of data transfer between host, buffer and nonvolatile memory
04/19/2005US6882563 Magnetic memory device and method for manufacturing the same
04/19/2005US6882561 Semiconductor memory device comprising memory having active restoration function
04/19/2005US6882557 Semiconductor memory device
04/19/2005US6882556 Semiconductor memory having a configuration of memory cells
04/19/2005US6882555 Bi-directional buffering for memory data lines
04/19/2005US6882554 Integrated memory, and a method of operating an integrated memory
04/19/2005US6882213 Temperature detection circuit insensitive to power supply voltage and temperature variation
04/14/2005WO2005034189A2 Integrated circuit power management for reducing leakage current in circuit arrays and method therefor
04/14/2005WO2005034176A2 Apparatus and method for selectively configuring a memory device using a bi-stable relay
04/14/2005WO2005034133A1 Method and apparatus for implicit dram precharge
04/14/2005WO2005034131A1 Clock receiver circuit arrangement, especially for semiconductor components
04/14/2005US20050081172 Sense amplifier circuit
04/14/2005US20050081013 Multi-partition architecture for memory
04/14/2005US20050080987 Random access interface in a serial memory device
04/14/2005US20050078938 Digital system for recording video signals
04/14/2005US20050078548 Method and memory system in which operating mode is set using address signal
04/14/2005US20050078547 Semiconductor memory device
04/14/2005US20050078544 Efficient implementation of multiple clock domain accesses to diffused memories in structured ASICs
04/14/2005US20050078542 Memory device having multiple array structure for increased bandwidth
04/14/2005US20050078540 Semiconductor device
04/14/2005US20050078539 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
04/14/2005US20050078538 Selective address-range refresh
04/14/2005US20050078537 Method and system for temperature compensation for memory cells with temperature-dependent behavior
04/14/2005US20050078536 Resistive cross point memory
04/14/2005US20050078535 Low power consumption semiconductor memory device capable of selectively changing input/output data width and data input/output method
04/14/2005US20050078534 Trench buried bit line memory devices and methods thereof
04/14/2005US20050078533 Physiological data recording apparatus for single handed application
04/14/2005US20050078532 Semiconductor memory module
04/14/2005US20050078530 Method and circuit configuration for digitizing a signal in an input buffer of a DRAM device
04/14/2005US20050078529 Programming methods for multi-level flash EEPROMs
04/14/2005US20050078523 Non-volatile semiconductor memory device
04/14/2005US20050078521 Programming methods for multi-level flash EEPROMs
04/14/2005US20050078513 Semiconductor nonvolatile memory device
04/14/2005US20050078505 AC sensing for a resistive memory
04/14/2005US20050078120 Apparatus for processing data, memory bank used therefor, semiconductor device, and memory for reading out pixel data
04/14/2005US20050078075 Display apparatus, method and device of driving the same
04/14/2005US20050077943 Semiconductor integrated circuit
04/14/2005US20050077940 Process and skew tolerant precharge circuit
04/14/2005US20050077929 Driver device, in particular for a semiconductor device, and method for operating a driver device
04/14/2005US20050077920 Enhanced protection for input buffers of low-voltage flash memories
04/14/2005US20050077555 Memory
04/14/2005DE19964062B4 Medium für einen Media-Player Medium for a media player
04/14/2005DE19651248B4 Betriebsmodussetzschaltung in einer Halbleitereinrichtung Operation mode setting circuit in a semiconductor device
04/14/2005DE10345489B3 Vorrichtung zur Verwendung bei der Synchronisation von Taktsignalen, sowie Taktsignal-Synchronisationsverfahren Apparatus for use in the synchronization of clock signals, and clock signal synchronization method
04/14/2005DE10344874B3 Schaltung zur Einstellung einer von mehreren Organisationsformen einer integrierten Schaltung und Verfahren zu ihrem Betrieb Circuit for setting one of several forms of organization of an integrated circuit and method for its operation
04/14/2005DE10330812A1 Halbleiterspeichermodul A semiconductor memory module
04/14/2005DE102004029955A1 Magnetic random access memory device for computer, has grid of bit and word line which is increased by inclusion of multiple diodes that reduce leakage currents circulating through non-selected ones of magnetic memory cells
04/14/2005DE10132920B4 Speichervorrichtung mit einer Speicherzelle und einer Bewertungsschaltung Memory device having a memory cell and an evaluation circuit
04/14/2005DE10110157B4 Halbleitervorrichtung mit verringertem Stromverbrauch im Standby-Zustand Semiconductor device with reduced power consumption in standby mode
04/13/2005CN1606875A Data processing unit and method, and program
04/13/2005CN1606238A Control circuit and reconfigurable logic block
04/13/2005CN1606095A Semiconductor memory device capable of adjusting impedance of data output driver
04/13/2005CN1606092A Method for intercrossed memory space disposition
04/13/2005CN1606091A Integrated circuit memory devices and operating methods that are configured to output data bits at a lower rate
04/13/2005CN1197163C Non-volatile semiconductor storage device
04/13/2005CN1197091C Semiconductor storage capable of increasing fetching speed of storage unit
04/13/2005CN1197090C High speed semiconductor memory device
04/13/2005CN1197089C Semiconductor device
04/13/2005CN1197088C Semiconductor integrated circuit device having clamp circuit
04/13/2005CN1197087C Synchronous semi-conductor storage
04/13/2005CN1197080C Semiconductor memory card, playback apparatus, recording apparatus, playback method, recording method, and computer-readable recording medium
04/13/2005CN1197012C Relative allocation device and method for data storage card
04/12/2005US6880144 High speed low power bitline
04/12/2005US6880094 Cas latency select utilizing multilevel signaling
04/12/2005US6880056 Memory array and method with simultaneous read/write capability
04/12/2005US6880055 Semiconductor memory device
04/12/2005US6880054 Portable data storage device having a secure mode of operation
04/12/2005US6880039 Rambus dynamic random access memory
04/12/2005US6879929 Sense amplifier thermal correction scheme
04/12/2005US6879541 Integrated circuit with improved output control signal and method for generating improved output control signal