Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/1997
12/02/1997US5694355 Memory cell and wordline driver for embedded DRAM in ASIC process
12/02/1997US5694354 Static random access memory device having a single bit line configuration
12/02/1997US5694353 Non-volatile ferroelectric memory device equipped with reference voltage generator for exactly regulating reference voltage to the mid point between two logic level and method of reading out data bit therefrom
12/02/1997US5694352 Semiconductor memory device having layout area of periphery of output pad reduced
12/02/1997US5694143 Single chip frame buffer and graphics accelerator
12/02/1997US5694059 Buffer of fine connection structure for connecting an atom level circuit and a general semiconductor circuit
12/02/1997US5693551 Method for fabricating a tri-state read-only memory device
11/1997
11/27/1997WO1997044790A1 Apparatus and method for minimizing dram recharge time
11/27/1997WO1997044789A1 High performance semiconductor memory devices having multiple dimension bit lines
11/27/1997WO1997044730A1 Field programmable gate array with distributed ram and increased cell utilization
11/26/1997EP0809359A1 Pulse generating circuit having address transition detecting circuit
11/26/1997EP0809253A2 Data latching circuit for read-out operations of data from memory device
11/26/1997EP0809251A2 Single-chip memory system having a multiple bit line structure for outputting a plurality of data simultaneously
11/26/1997EP0809250A2 Semiconductor storage device
11/26/1997EP0809249A1 Input circuit for semiconductor memory device
11/26/1997EP0698279B1 Bi-stable memory element
11/26/1997EP0649566B1 Process for producing storage capacitors for dram cells
11/26/1997EP0614583A4 Integrated emi/rfi filter magnetics.
11/26/1997CN1166033A Latch circuit
11/25/1997US5691956 Memory with fast decoding
11/25/1997US5691955 Synchronous semiconductor memory device operating in synchronization with external clock signal
11/25/1997US5691954 Semiconductor memory device in which data are read and written asynchronously with application of address signal
11/25/1997US5691952 Semiconductor memory device and memory module using the same
11/25/1997US5691951 Row decoder circuit in a memory integrated circuit
11/25/1997US5691950 Device and method for isolating bit lines from a data line
11/25/1997US5691949 Very high density wafer scale device architecture
11/25/1997US5691946 Row redundancy block architecture
11/25/1997US5691942 Semiconductor memory having extended data out function
11/25/1997US5691936 Magnetoresistive element and memory element
11/25/1997US5691935 Memory element and method of operation thereof
11/25/1997US5691934 Memory cell and method of operation thereof
11/25/1997US5691933 Semiconductor memory device having improved bit line distribution
11/25/1997US5691865 Magnetic device and method for locally controllably altering magnetization direction
11/25/1997US5691661 Pulse generating circuit and a semiconductor memory device provided with the same
11/20/1997WO1997043767A1 Shared dram i/o databus for high speed operation
11/20/1997DE19701003A1 DRAM cell with two FETs for computer
11/20/1997DE19636307A1 DRAM Memory cell using FET for computer system
11/19/1997EP0808022A2 Latch circuit operating in synchronization with clock signals
11/19/1997EP0808014A2 A voltage booster circuit
11/19/1997EP0807308A2 Circuits, systems and methods for improving row select speed in a row select memory device
11/19/1997CN1165435A Output buffer circuit
11/19/1997CN1165381A High density storage structure
11/18/1997US5689473 Multi-bank synchronous memory system with cascade-type memory cell structure
11/18/1997US5689471 Dummy cell for providing a reference voltage in a memory array
11/18/1997US5689469 Semiconductor memory devices
11/18/1997US5689468 Semiconductor memory device and method for driving the same
11/18/1997US5689467 Apparatus and method for reducing test time of the data retention parameter in a dynamic random access memory
11/18/1997US5689464 Column repair circuit for integrated circuits
11/18/1997US5689462 Parallel output buffers in memory circuits
11/18/1997US5689461 Semiconductor memory device having voltage booster circuit coupled to a bit line charging/equalizing circuit or switch
11/18/1997US5689460 Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage
11/18/1997US5689458 Semiconductor memory device having negative resistance element operated stably with single low power source
11/18/1997US5689457 Semiconductor Memory
11/18/1997US5689456 Semiconductor non-volatile ferroelectric memory transistor accompanied with capacitor for increasing potential difference applied to ferroelectric layer
11/18/1997US5689213 Post-fabrication programmable integrated circuit ring oscillator
11/13/1997WO1997042660A1 Storage cell arrangement in which vertical mos transistors have at least three different threshold voltages depending on stored data, and method of producing said arrangement
11/13/1997DE19719316A1 Abtastverstärkungsschaltung eines Halbleiterspeicherbauelementes Abtastverstärkungsschaltung a semiconductor memory device
11/13/1997DE19717123A1 Magnetic state recognition method for magnetic memory cell, e.g. MRAM,
11/13/1997DE19651340A1 Semiconductor memory device
11/13/1997DE19617646A1 Speicherzellenanordnung und Verfahren zu deren Herstellung Memory cell arrangement, and processes for their preparation
11/12/1997EP0806045A1 Decoded wordline driver with positive and negative voltage modes
11/12/1997EP0514164B1 Efficiency improved DRAM row redundancy circuit
11/12/1997CN1164742A Semiconductor storage device
11/11/1997US5687382 High speed, reduced power memory system implemented according to access frequency
11/11/1997US5687351 Dual port video memory using partial column lines
11/11/1997US5687134 Synchronous semiconductor memory capable of saving a latency with a reduced circuit scale
11/11/1997US5687132 Multiple-bank memory architecture and systems and methods using the same
11/11/1997US5687130 Monolithic device
11/11/1997US5687128 Power supply voltage boosting circuit of semiconductor memory device
11/11/1997US5687127 Sense amplifier of semiconductor memory having an increased reading speed
11/11/1997US5687125 Semiconductor memory device having redundancy memory cells incorporated into sub memory cell blocks
11/11/1997US5687123 Semiconductor memory device
11/11/1997US5687122 Data output buffer
11/11/1997US5687121 Flash EEPROM worldline decoder
11/11/1997US5687115 Write circuits for analog memory
11/11/1997US5687114 Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell
11/11/1997US5687113 Electrically programmable memory cell
11/11/1997US5687112 Multibit single cell memory element having tapered contact
11/11/1997US5687111 Static type semiconductor memory device capable of operating at a low voltage and reducing a memory cell area
11/11/1997US5686752 Semiconductor device having a CMOS element as a buffer
11/11/1997US5686336 Method of manufacture of four transistor SRAM cell layout
11/06/1997WO1997041640A1 Stabilization circuits for multiple digital bits
11/06/1997WO1997041601A1 All-metal, giant magnetoresistive, solid-state component
11/06/1997DE19649876A1 Semiconductor memory e.g. DRAM/SOI-DRAM
11/05/1997EP0805451A2 Integrated circuit memory using fusible links in a scan chain
11/05/1997EP0676081A4 Pattern search and refresh logic in dynamic memory.
11/04/1997US5684751 Dynamic memory refresh controller utilizing array voltage
11/04/1997US5684749 Single-ended sensing using global bit lines for dram
11/04/1997US5684748 Circuit for testing reliability of chip and semiconductor memory device having the circuit
11/04/1997US5684746 Semiconductor memory device in which a failed memory cell is placed with another memory cell
11/04/1997US5684745 SRAM device with a bit line discharge circuit for low power
11/04/1997US5684743 Multiport memory cell circuit having read buffer for reducing read access time
11/04/1997US5684739 Apparatus and method for determining current or voltage of a semiconductor device
11/04/1997US5684737 SRAM cell utilizing bistable diode having GeSi structure therein
11/04/1997US5684736 Multilevel memory cell sense amplifier system
11/04/1997US5684735 Semiconductor memory cell
11/04/1997US5684418 Clock signal generator
11/04/1997US5684390 Active semiconductor device with matched reference component maintained in breakdown mode
11/04/1997US5683661 Electromagnetic radiation, supporting a sample in opaque housing
10/1997
10/30/1997WO1997040500A1 Semiconductor memory