| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 02/17/1998 | US5719531 Data transmission circuit, data line driving circuit, amplifying circuit, semiconductor integrated circuit, and semiconductor memory |
| 02/17/1998 | US5719520 Multi-valued ROM circuit #7 |
| 02/17/1998 | US5718983 Thin film composite having ferromagnetic and piezoelectric properties comprising a layer of Pb-Cd-Fe and a layer of Cr-Zn-(Te or Tl) |
| 02/12/1998 | WO1998006102A1 Antifuse detect circuit |
| 02/12/1998 | WO1998006101A1 Method of operating a storage cell arrangement |
| 02/12/1998 | DE19712553A1 Semiconductor memory circuit, e.g. CRDL, for multimedia in lap-top computer |
| 02/11/1998 | EP0823785A2 Input circuit |
| 02/11/1998 | EP0823711A2 Digital memory element |
| 02/11/1998 | EP0823116A1 Circuits, systems and methods for modifying data stored in a memory using logic operations |
| 02/11/1998 | EP0531695B1 Self-timed random access memories |
| 02/11/1998 | CN1173044A Semiconductor elemetn and data processing equipment ted used it |
| 02/11/1998 | CN1173043A Semiconductor memory device |
| 02/11/1998 | CN1173023A Booster circuit and method of driving the same |
| 02/10/1998 | US5717654 Burst EDO memory device with maximized write cycle timing |
| 02/10/1998 | US5717653 Late-write type SRAM in which address-decoding time for reading data differs from address-decoding time for writing data |
| 02/10/1998 | US5717652 Semiconductor memory device capable of high speed plural parallel test, method of data writing therefor and parallel tester |
| 02/10/1998 | US5717651 Semiconductor memory |
| 02/10/1998 | US5717650 Row/column decoder circuits for a semiconductor memory device |
| 02/10/1998 | US5717649 Semiconductor memory device using sub-wordline drivers having width/length ratio of transistors varies from closest to farthest location from memory block selection circuits |
| 02/10/1998 | US5717648 Fully integrated cache architecture |
| 02/10/1998 | US5717647 Expandable data width sam for a multiport ram |
| 02/10/1998 | US5717645 Random access memory with fast, compact sensing and selection architecture |
| 02/10/1998 | US5717644 Apparatus for varying the refresh rate for a DRAM in response to variation in operating voltages and method thereof |
| 02/10/1998 | US5717643 Semiconductor memory device with testing function |
| 02/10/1998 | US5717639 For storing data |
| 02/10/1998 | US5717638 Multi-port memory cells and memory with parallel data initialization |
| 02/10/1998 | US5717637 Semiconductor memory device |
| 02/10/1998 | US5717632 Apparatus and method for multiple-level storage in non-volatile memories |
| 02/10/1998 | US5717629 Memory circuit and method of operation therefor |
| 02/10/1998 | US5717627 Optical memory device incorporating photodetector devices and light emitting devices |
| 02/10/1998 | US5717625 Semiconductor memory device |
| 02/10/1998 | US5717441 Picture data memory with high access efficiency in detecting motion vectors, a motion vector detection circuit provided with the picture data memory, and an address conversion circuit |
| 02/10/1998 | US5717359 Semiconductor integrated circuit having elongated fixed potential lines to reduce noise on the lines |
| 02/10/1998 | US5717354 Input protection circuit and method for semiconductor memory device |
| 02/10/1998 | US5717353 Clock signal generating circuit |
| 02/10/1998 | US5717324 Intermediate potential generation circuit |
| 02/10/1998 | US5717235 Non-volatile memory device having ferromagnetic and piezoelectric properties |
| 02/05/1998 | WO1998005070A1 Static memory cell |
| 02/05/1998 | DE19724222A1 DRAM with novel capacitor cell layout |
| 02/04/1998 | EP0822594A2 MOS transistor for DRAM cell |
| 02/04/1998 | EP0822496A2 Fuse refresh circuit |
| 02/04/1998 | EP0822476A2 Internal voltage generating circuit |
| 02/04/1998 | CN1172329A Sense circuit |
| 02/03/1998 | US5715212 Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion |
| 02/03/1998 | US5715211 Synchronous dynamic random access memory |
| 02/03/1998 | US5715210 Low power semiconductor memory device |
| 02/03/1998 | US5715209 Integrated circuit memory devices including a dual transistor column selection switch and related methods |
| 02/03/1998 | US5715206 Dynamic random access memory having sequential word line refresh |
| 02/03/1998 | US5715203 Semiconductor memory device and automatic bit line precharge method therefor |
| 02/03/1998 | US5715202 Semiconductor memory device |
| 02/03/1998 | US5715198 Output latching circuit for static memory devices |
| 02/03/1998 | US5715192 Semiconductor memory device |
| 02/03/1998 | US5715191 Data storage device |
| 02/03/1998 | US5715190 Semiconductor memory device |
| 02/03/1998 | US5715189 Semiconductor memory device having hierarchical bit line arrangement |
| 02/03/1998 | US5715121 Magnetoresistance element, magnetoresistive head and magnetoresistive memory |
| 02/03/1998 | US5714893 Signal transmission circuit |
| 02/03/1998 | US5714768 Second-layer phase change memory array on top of a logic device |
| 02/03/1998 | US5714766 Nano-structure memory device |
| 02/03/1998 | US5714412 Using an erasable programmable read only memory with tunnel oxide process |
| 01/29/1998 | WO1998003978A1 Reference apparatus, reference level setting method, self-diagnosis method and nonvolatile semiconductor memory |
| 01/29/1998 | WO1998003977A1 Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping |
| 01/29/1998 | DE19727817A1 Threshold voltage control circuit for semiconductor device |
| 01/29/1998 | DE19649410A1 Non volatile memory cell for e.g. flash EEPROM or flash memory card |
| 01/29/1998 | DE19631911A1 Charge feedback differential logic circuit, e.g. for VLSI technology and multimedia system |
| 01/28/1998 | EP0821471A2 Device for self-aligning the adjustment of the bias working point in amplifier circuits with Neuron-MOS transistors |
| 01/28/1998 | EP0821365A1 Improvements in integrated multistate magnetic static write-read and erase memory |
| 01/28/1998 | EP0821364A2 Sense circuit |
| 01/28/1998 | EP0821363A2 Semiconductor memory device controlled in synchronous with external clock |
| 01/28/1998 | EP0820631A1 Circuit for sram test mode isolated bitline modulation |
| 01/28/1998 | EP0704072B1 Apparatus and method for adjusting the threshold voltage of mos transistors |
| 01/28/1998 | CN1171867A Interleaved and sequential counter |
| 01/28/1998 | CN1171632A Medium voltage generating circuit and nonvolatile semiconductor memory containing same |
| 01/28/1998 | CN1171600A Nonvolatile memory cell and method for programming same |
| 01/28/1998 | CN1171591A Structures and methods for limiting current in ionizable gaseous medium devices |
| 01/27/1998 | US5713011 Synchronized data processing system and image processing system |
| 01/27/1998 | US5712827 Dynamic type memory |
| 01/27/1998 | US5712825 Maintaining data integrity in DRAM while varying operating voltages |
| 01/27/1998 | US5712824 Semiconductor static memory device with pulse generator for reducing write cycle time |
| 01/27/1998 | US5712823 Flexible dram array |
| 01/27/1998 | US5712819 Flash EEPROM system with storage of sector characteristic information within the sector |
| 01/27/1998 | US5712817 Highly integrated cell having a reading transistor and a writing transistor |
| 01/27/1998 | US5712815 Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells |
| 01/27/1998 | US5712813 Multi-level storage capacitor structure with improved memory density |
| 01/27/1998 | US5712556 Intermediate potential generating circuit having output stabilizing circuit |
| 01/27/1998 | US5712180 EEPROM with split gate source side injection |
| 01/22/1998 | WO1998002886A2 Memory with fast decoding |
| 01/22/1998 | WO1997047041A3 Programmable, non-volatile memory device, and method of manufacturing such a device |
| 01/22/1998 | DE4143562C2 Support cache-memory for semiconductor memory |
| 01/22/1998 | DE19704999A1 Programming method for non volatile memory, e.g. EEPROM |
| 01/21/1998 | EP0820065A2 Dynamic memory device with refresh circuit and refresh method |
| 01/21/1998 | EP0820007A2 Pipelined computer |
| 01/21/1998 | EP0469252B1 Laser link decoder for DRAM redundancy scheme |
| 01/21/1998 | CN1170936A Semiconductor integrated circuit having test circuit |
| 01/21/1998 | CN1170934A Method of programming nonvolatile memory |
| 01/20/1998 | US5710742 High density two port SRAM cell for low voltage CMOS applications |
| 01/20/1998 | US5710741 Power up intialization circuit responding to an input signal |
| 01/20/1998 | US5710740 Circuit including DRAM and voltage regulator, and method of increasing speed of operation of a DRAM |
| 01/20/1998 | US5710739 Reading circuit for memory cells |
| 01/20/1998 | US5710738 Low power dynamic random access memory |