Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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01/20/1998 | US5710737 Semiconductor memory device |
01/20/1998 | US5710736 Semiconductor storage device |
01/20/1998 | US5710734 Semiconductor memory device and data writing method thereof |
01/20/1998 | US5710516 Input logic signal buffer circuits |
01/15/1998 | WO1998001861A1 Nonvolatile semiconductor storage device |
01/15/1998 | WO1998001762A2 A magnetic field sensor and a method of manufacturing such a sensor |
01/14/1998 | EP0818891A2 Programmable logic arrays |
01/14/1998 | EP0818787A2 Improvements in or relating to semiconductor devices |
01/14/1998 | EP0818735A2 Input buffer circuit coping with high-frequency clock signal |
01/14/1998 | EP0818734A2 Switchable bus driver termination resistance |
01/13/1998 | US5708797 IC memory with divisional memory portions |
01/13/1998 | US5708625 Voltage level detector |
01/13/1998 | US5708624 Method and structure for controlling internal operations of a DRAM array |
01/13/1998 | US5708623 Semiconductor memory decoder device |
01/13/1998 | US5708622 Clock synchronous semiconductor memory device |
01/13/1998 | US5708621 Semiconductor memory with improved word line structure |
01/13/1998 | US5708620 Memory device having a plurality of bitlines between adjacent columns of sub-wordline drivers |
01/13/1998 | US5708618 Multiport field memory |
01/13/1998 | US5708616 Low noise sense amplifier control circuits for dynamic random access memories and related methods |
01/13/1998 | US5708614 Data output control circuit of semiconductor memory device having pipeline structure |
01/13/1998 | US5708612 Semiconductor memory device |
01/13/1998 | US5708611 Synchronous semiconductor memory device |
01/13/1998 | US5708610 Semiconductor memory device and semiconductor device |
01/13/1998 | US5708607 Data read circuit of a memory |
01/13/1998 | US5708600 Method for writing multiple value into nonvolatile memory in an equal time |
01/13/1998 | US5708599 Semiconductor memory device capable of reducing power consumption |
01/13/1998 | US5708598 System and method for reading multiple voltage level memories |
01/13/1998 | US5708597 Structure and method for implementing a memory system having a plurality of memory blocks |
01/13/1998 | US5708382 Clock signal modeling circuit |
01/13/1998 | US5708373 Boost circuit |
01/13/1998 | US5708285 Non-volatile semiconductor information storage device |
01/13/1998 | US5708284 Non-volatile random access memory |
01/13/1998 | US5707887 Method of manufacturing a non-volatile random accessible memory device |
01/08/1998 | WO1998000846A1 Method and apparatus for protecting flash memory |
01/08/1998 | DE19726077A1 Memory cell structure for MRAM |
01/08/1998 | DE19650820A1 Power supply interference signal elimination method in integrated circuit |
01/07/1998 | EP0817270A2 Improved semiconductor memory device including memory cells connected to a ground line |
01/07/1998 | EP0817200A1 Clock circuit for reading a multilevel non volatile memory cells device |
01/07/1998 | EP0817199A2 Improvements in or relating to electronic circuits |
01/07/1998 | EP0817198A1 Semiconductor memory device |
01/07/1998 | EP0815561A2 Optimization circuitry and control for a synchronous memory device with programmable latency period |
01/07/1998 | CN1169594A Semiconductor device |
01/07/1998 | CN1169578A Semiconductor memory device |
01/07/1998 | CN1036957C Inductor element for magnetic interference/radio-frequency interference filter |
01/06/1998 | US5706482 Memory access controller |
01/06/1998 | US5706474 Synchronous memory system with asynchronous internal memory operation |
01/06/1998 | US5706468 Method and apparatus for monitoring and interfacing a dual port random access memory in a system having at least two independent CPUs |
01/06/1998 | US5706292 Layout for a semiconductor memory device having redundant elements |
01/06/1998 | US5706247 Integrated memory device |
01/06/1998 | US5706246 Address transition detection circuit |
01/06/1998 | US5706245 Word line decoding circuit of a semiconductor memory device |
01/06/1998 | US5706244 Semiconductor memory device having shared sense amplifier arrays individually controlled for cache storage |
01/06/1998 | US5706243 Semiconductor memory and method of using the same, column decoder, and image processor |
01/06/1998 | US5706237 Self-restore circuit with soft error protection for dynamic logic circuits |
01/06/1998 | US5706236 Semiconductor memory device |
01/06/1998 | US5706233 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing |
01/06/1998 | US5706231 Semiconductor memory device having a redundant memory cell |
01/06/1998 | US5706230 Internal voltage boosting method and circuit for a semiconductor memory device |
01/06/1998 | US5706229 Semiconductor memory device |
01/06/1998 | US5706226 Low voltage CMOS SRAM |
01/06/1998 | US5706225 Memory apparatus with dynamic memory cells having different capacitor values |
01/02/1998 | DE19727424A1 Input buffer for solid state memories |
01/02/1998 | DE19727087A1 Synchronous graphic RAM |
01/02/1998 | DE19723432A1 Verfahren zum Verteilen von Banken in einem Halbleiterspeicher-Bauelement Procedure for the distribution of banks in a semiconductor memory device |
12/31/1997 | WO1997050090A1 A multiple bits-per-cell flash shift register page buffer |
12/31/1997 | WO1997050089A1 A method for a multiple bits-per-cell flash eeprom with page mode program and read |
12/31/1997 | CN1169205A Reresh strategy for DRAMS |
12/30/1997 | US5703832 tRAS protection circuit |
12/30/1997 | US5703831 Synchronous semiconductor memory device having internal circuitry enabled only when commands are applied in normal sequence |
12/30/1997 | US5703830 Syncronous dynamic semiconductor memory device using pipelined multi-bit prefetch architecture |
12/30/1997 | US5703829 Synchronous type semiconductor memory device which can be adapted to high frequency system clock signal |
12/30/1997 | US5703828 Semiconductor memory |
12/30/1997 | US5703827 Method and structure for generating a boosted word line voltage and a back bias voltage for a memory array |
12/30/1997 | US5703825 Semiconductor integrated circuit device having a leakage current reduction means |
12/30/1997 | US5703824 Semiconductor memory device |
12/30/1997 | US5703823 Data processing system |
12/30/1997 | US5703822 Serial access memory device including memory sections having different latencies |
12/30/1997 | US5703819 Sense amplifier driving circuit |
12/30/1997 | US5703817 Semiconductor memory device |
12/30/1997 | US5703816 Failed memory cell repair circuit of semiconductor memory |
12/30/1997 | US5703815 High-speed semiconductor memory system |
12/30/1997 | US5703814 Semiconductor memory device having dual boosting circuits to reduce energy required to supply boosting voltages |
12/30/1997 | US5703811 Data output buffer circuit of semiconductor memory device |
12/30/1997 | US5703806 Graphics controller integrated circuit without memory interface |
12/30/1997 | US5703805 Method for detecting information stored in a MRAM cell having two magnetic layers in different thicknesses |
12/30/1997 | US5703804 Semiconductor memory device |
12/30/1997 | US5703499 Address bit latching input circuit |
12/30/1997 | US5703495 Data output impedance control |
12/30/1997 | US5703475 Reference voltage generator with fast start-up and low stand-by power |
12/30/1997 | US5702831 Multilayer read only memory; high density, magnetoresistance |
12/29/1997 | EP0814478A2 Multibank-multiport memories and systems and methods using the same |
12/29/1997 | EP0814410A2 Dual port memories and systems and methods using the same |
12/29/1997 | EP0813711A1 Error management processes for flash eeprom memory arrays |
12/29/1997 | EP0813705A1 High precision voltage regulation circuit for programming multilevel flash memory |
12/24/1997 | WO1997049088A1 Multi-level memory circuit with regulated writing voltage |
12/24/1997 | WO1997049087A1 Multi-level memory circuit with regulated reading voltage |
12/24/1997 | WO1997049086A1 Flash memory address decoder with novel latch |
12/23/1997 | US5701275 Pipelined chip enable control circuitry and methodology |
12/23/1997 | US5701273 Memory device |
12/23/1997 | US5701271 Integrated circuit memory devices including banks of memory blocks |