| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 04/15/1997 | US5621559 Ferroelectric optical computing device with low optical power non-destructive read-out |
| 04/15/1997 | US5621343 Demodulator circuit which demodulates pulse width modulated signals used in a semiconductor integrated circuit |
| 04/10/1997 | WO1997013251A1 Gated recording of holograms using rare-earth doped ferroelectric materials |
| 04/10/1997 | WO1997013250A1 Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
| 04/10/1997 | DE19601369C1 Voltage multiplier or providing negative high voltage |
| 04/09/1997 | EP0767464A2 Ferroelectric memory and method of reading out data from the ferroelectric memory |
| 04/09/1997 | EP0766866A1 A continuous page random access memory and systems and methods using the same |
| 04/09/1997 | CN1147166A Sense amplifier for semiconductor memory device |
| 04/09/1997 | CN1147136A Data output buffer circuit of semiconductor memory device |
| 04/09/1997 | CN1147135A Semiconductor memory |
| 04/08/1997 | US5619676 High speed semiconductor memory including a cache-prefetch prediction controller including a register for storing previous cycle requested addresses |
| 04/08/1997 | US5619674 Multiport cache memory having read-only parts and read-write parts |
| 04/08/1997 | US5619473 Semiconductor memory device with dual address memory read amplifiers |
| 04/08/1997 | US5619472 Semiconductor memory device with a plurality of bonding pads arranged in an array |
| 04/08/1997 | US5619470 Semiconductor memory device |
| 04/08/1997 | US5619468 For controlling timing signals |
| 04/08/1997 | US5619467 Sense amplifier for semiconductor memory device having feedback circuits |
| 04/08/1997 | US5619466 Low-power read circuit and method for controlling a sense amplifier |
| 04/08/1997 | US5619465 Semiconductor memory device |
| 04/08/1997 | US5619463 Integrated circuit device and test method therefor |
| 04/08/1997 | US5619462 Fault detection for entire wafer stress test |
| 04/08/1997 | US5619457 Dynamic semiconductor memory device that can control through current of input buffer circuit for external input/output control signal |
| 04/08/1997 | US5619455 Pipeline-operating type memory system capable of reading data from a memory array having data width larger than the output data width |
| 04/08/1997 | US5619449 Bit line sensing in a memory array |
| 04/08/1997 | US5619448 Non-volatile memory device and apparatus for reading a non-volatile memory array |
| 04/08/1997 | US5619447 Ferro-electric memory array architecture and method for forming the same |
| 04/08/1997 | US5619445 Analog memory system having a frequency domain transform processor |
| 04/08/1997 | US5619164 Pseudo ground line voltage regulator |
| 04/08/1997 | US5619162 Signal control circuit for generating an output potential |
| 04/08/1997 | US5619149 Single ended dynamic sense amplifier |
| 04/08/1997 | US5619147 CMOS buffer with controlled slew rate |
| 04/08/1997 | US5619124 Reference voltage generator in a semiconductor integrated device |
| 04/03/1997 | WO1997012370A1 Register file read/write cell |
| 04/03/1997 | WO1997012369A1 Variable stage charge pump |
| 04/03/1997 | WO1997012368A1 Multiple writes per a single erase for a nonvolatile memory |
| 04/03/1997 | WO1997012367A1 Multiple writes per a single erase for a nonvolatile memory |
| 04/03/1997 | DE19639972A1 Hochgeschwindigkeitstestschaltkreis für eine Halbleiterspeichervorrichtung High-speed test circuit for a semiconductor memory device |
| 04/02/1997 | EP0766401A1 Superconducting nonhysteretic logic design |
| 04/02/1997 | EP0766259A2 Dynamic random access memory |
| 04/02/1997 | EP0766258A2 Dram signal margin test method |
| 04/02/1997 | EP0766254A2 Non-volatile multi-state memory device capable with variable storing resolution |
| 04/02/1997 | EP0766253A2 Non-volatile ferroelectric memory device equipped with reference voltage generator for exactly regulating reference voltage to the mid point between two logic level and method of reading out data bit therefrom |
| 04/02/1997 | EP0766252A2 Rating and amplifier circuit |
| 04/02/1997 | EP0766251A2 Semiconducteur memory device having extended margin in latching input signal |
| 04/02/1997 | EP0766175A1 Integrated semiconductor memory having redundant memory cells |
| 04/02/1997 | CN2251185Y Split-type digital phonetic recording management apparatus |
| 04/02/1997 | CN1146638A Semiconductor device capable of reducing power dissipation in stand-by state |
| 04/02/1997 | CN1146605A Highly integrated storage element and making method |
| 04/02/1997 | CN1146604A Storage device with layered position-line |
| 04/01/1997 | US5617551 Controller for refreshing a PSRAM using individual automatic refresh cycles |
| 04/01/1997 | US5617369 Dynamic semiconductor memory device having excellent charge retention characteristics |
| 04/01/1997 | US5617368 Semiconductor memory device equipped with serial data reading circuit and method of outputting serial data from semiconductor memory |
| 04/01/1997 | US5617366 Method and apparatus for a test control circuit of a semiconductor memory device |
| 04/01/1997 | US5617364 Semiconductor memory device |
| 04/01/1997 | US5617363 Dynamic random access memory having sense amplifier control circuit supplied with external sense amplifier activating signal |
| 04/01/1997 | US5617362 Semiconductor memory device having extended data out function |
| 04/01/1997 | US5617355 Semiconductor memory device having positive feedback sense amplifier |
| 04/01/1997 | US5617349 Ferroelectric memory and method for controlling operation of the same |
| 04/01/1997 | US5617045 Input circuit for processing small amplitude input signals |
| 04/01/1997 | US5617043 Output buffer with reference voltage circuit for increasing speed |
| 04/01/1997 | US5616510 Method for making multimedia storage system with highly compact memory cells |
| 03/27/1997 | WO1997011465A2 Sram storage cell |
| 03/27/1997 | DE19535106A1 SRAM-Speicherzelle SRAM memory cell |
| 03/27/1997 | DE19534856A1 Digital memory device with spin coupled magnetic layer for read=out and/or write operation |
| 03/26/1997 | EP0765037A2 Buffer for integrated circuit memories |
| 03/26/1997 | EP0764952A2 An apparatus and method for a data path implemented using non-differential current mode techniques |
| 03/26/1997 | EP0764329A1 A method for programming an amg eprom or flash memory when cells of the array are formed to store multiple bits of data |
| 03/26/1997 | EP0764328A1 A method for programming a single eprom or flash memory cell to store multiple levels of data that utilizes a forward-biased source-to-substrate junction |
| 03/26/1997 | CN1146052A Method for programming nonvolatile memory |
| 03/26/1997 | CN1034373C Boosting circuit device capable of pre-pumping and semiconductor memory device |
| 03/25/1997 | US5615380 Integrated circuit computer system having a keyboard input and a sound output |
| 03/25/1997 | US5615169 Method and structure for controlling internal operations of a DRAM array |
| 03/25/1997 | US5615166 Semiconductor memory integrated circuit |
| 03/25/1997 | US5615164 Latched row decoder for a random access memory |
| 03/25/1997 | US5615163 Semiconductor memory device |
| 03/25/1997 | US5615161 Clocked sense amplifier with positive source feedback |
| 03/25/1997 | US5615160 Minimal recharge overhead circuit for domino SRAM structures |
| 03/25/1997 | US5615156 Semiconductor memory device having plural memory mats with centrally located reserve bit or word lines |
| 03/25/1997 | US5615145 Semiconductor memory with ferroelectric capacitors |
| 03/25/1997 | US5615144 Non-volatile ferroelectric memory device with leakage preventing function |
| 03/25/1997 | US5615142 Analog memory system storing and communicating frequency domain information |
| 03/25/1997 | US5614859 Two stage voltage level translator |
| 03/25/1997 | US5614849 Method of resetting a CMOS amplifier |
| 03/25/1997 | US5614846 Latch circuit with state-walk logic |
| 03/20/1997 | WO1997010603A1 Method and apparatus for detecting assertion of multiple signals |
| 03/20/1997 | WO1997010602A1 Refresh strategy for drams |
| 03/20/1997 | WO1997010601A1 Refresh strategy for drams |
| 03/20/1997 | WO1997010599A1 Fast word line decoder for memory devices |
| 03/20/1997 | WO1997010598A1 Interlaced layout configuration for differential pairs of interconnect lines |
| 03/19/1997 | EP0763832A1 Bistable magnetic element and method of manufacturing the same |
| 03/19/1997 | EP0763830A2 Arrangement of memory cells in matrix form |
| 03/19/1997 | EP0763829A2 Method for programming a nonvolatile memory |
| 03/19/1997 | EP0763828A2 Nonvolatile semiconductor memory device and method for using the same |
| 03/19/1997 | EP0763827A2 Semiconductor memory device having serial access port |
| 03/19/1997 | EP0763790A2 Level shifter capable of stably producing a level shifted voltage |
| 03/19/1997 | EP0763242A1 Sensing schemes for flash memory with multilevel cells |
| 03/19/1997 | EP0763241A1 Dynamic single to multiple bit per cell memory |
| 03/19/1997 | EP0763240A1 Bit map addressing schemes for flash memory |
| 03/19/1997 | CN1145534A Flash eeprom cell and manfacturing methods thereof |
| 03/19/1997 | CN1145487A Probe apparatus having reduced misalignment of conductive needles |