| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 03/18/1997 | US5612925 Semiconductor memory device |
| 03/18/1997 | US5612924 Semiconductor memory device using internal voltage obtained by boosting supply voltage |
| 03/18/1997 | US5612920 Semiconductor memory device having a voltage down converter for generating an internal power supply voltage from an external power supply |
| 03/18/1997 | US5612919 Method of testing an operation of a semiconductor memory device and semiconductor memory device which can be subjected to such an operation test |
| 03/18/1997 | US5612918 Redundancy architecture |
| 03/18/1997 | US5612917 Semiconductor memory device including improved redundancy circuit |
| 03/18/1997 | US5612912 Method of multilevel DRAM sense and restore |
| 03/18/1997 | US5612644 Circuits, systems and methods for controlling substrate bias in integrated circuits |
| 03/18/1997 | US5612633 Circuit for simultaneously inputting and outputting signals on a single wire |
| 03/18/1997 | US5612238 Method of manufacturing first and second memory cell arrays with a capacitor and a nonvolatile memory cell |
| 03/13/1997 | DE19611212A1 Semiconductor memory read=out device |
| 03/13/1997 | DE19548446A1 Semiconductor memory appts. for e.g. DRAM or ROM integrated circuit |
| 03/12/1997 | EP0762502A1 DRAM cell array layout |
| 03/12/1997 | EP0762429A2 Method of programming a flash EEPROM memory cell optimized for low power consumption and a method for erasing said cell |
| 03/12/1997 | EP0762427A1 Semiconductor memory |
| 03/12/1997 | EP0762290A1 Input buffer circuit |
| 03/12/1997 | EP0762262A1 Clock generating circuit, PLL circuit |
| 03/12/1997 | CN1144974A Soft error suppressing resistance load type static DASD cell |
| 03/12/1997 | CN1144964A Integrated logic circuit and EEPROM |
| 03/12/1997 | CN1144963A Sense amplifier |
| 03/12/1997 | CN1144926A Clock generating circuit, PLL circuit, semiconductor device and designing method |
| 03/11/1997 | US5610874 Fast burst-mode synchronous random access memory device |
| 03/11/1997 | US5610872 Multi-bank synchronous memory system with cascade-type memory cell structure |
| 03/11/1997 | US5610871 Semiconductor memory device having a hierarchical bit line structure with reduced interference noise |
| 03/11/1997 | US5610870 Circuit and method for controlling the impedance of a serial access memory |
| 03/11/1997 | US5610868 Semiconductor memory device |
| 03/11/1997 | US5610867 DRAM signal margin test method |
| 03/11/1997 | US5610866 Circuit structure and method for stress testing of bit lines |
| 03/11/1997 | US5610864 Burst EDO memory device with maximized write cycle timing |
| 03/11/1997 | US5610863 Memory device having a booster circuit and a booster circuit control method |
| 03/11/1997 | US5610861 Flash memory device |
| 03/11/1997 | US5610857 Memory element with multibit storage |
| 03/11/1997 | US5610855 Multi-valued semiconductor memory device |
| 03/11/1997 | US5610852 Ferroelectric memory and method for controlling operation of the same |
| 03/11/1997 | US5610573 Method and apparatus for detecting assertion of multiple signals |
| 03/11/1997 | US5610550 Intermediate potential generator stably providing an internal voltage precisely held at a predeterminded intermediate potential level with reduced current consumption |
| 03/11/1997 | US5610549 Voltage boosting circuit of a semiconductor memory circuit |
| 03/11/1997 | US5610542 Power-up detection circuit |
| 03/11/1997 | US5610540 Low power sensor amplifier for gain memory cells |
| 03/06/1997 | WO1997008706A1 Electrically programmable memory, method of programming and method of reading |
| 03/06/1997 | WO1997008705A1 Method and structure for controlling internal operations of a dram array |
| 03/06/1997 | WO1997008704A1 Circuits, systems and methods for controlling substrate bias in integrated circuits |
| 03/06/1997 | WO1997008703A1 Expandable data width sam for a multiport ram |
| 03/06/1997 | WO1997008702A1 Improved memory interface for dram |
| 03/06/1997 | WO1997008701A1 Integrated circuit memory with back end mode disable |
| 03/06/1997 | WO1997008700A1 Reduced area sense amplifier isolation layout in a dynamic ram architecture |
| 03/06/1997 | WO1997004457A3 Pipelined address memories, and systems and methods using the same |
| 03/06/1997 | DE4407954C2 Halbleiterspeichereinrichtung A semiconductor memory device |
| 03/06/1997 | DE19636083A1 Bistable trigger circuit formed by series connection of two semiconductor memories |
| 03/06/1997 | DE19634967A1 Semiconductor memory with high velocity read-out |
| 03/05/1997 | EP0760518A2 Circuitry and methodology to test single bit failures of integrated circuit memory devices |
| 03/05/1997 | EP0760517A2 Non-volatile multi-state memory device with memory cell capable of storing multi-state data |
| 03/05/1997 | EP0760516A2 Non-volatile multi-state memory device with memory cell capable of storing multi-state data |
| 03/05/1997 | EP0760515A2 Method for reading and restoring data in a data storage element |
| 03/05/1997 | EP0760513A2 A voltage circuit for preventing voltage fluctuation |
| 03/05/1997 | EP0760512A2 Low pin count - wide memory devices and systems and methods using the same |
| 03/05/1997 | EP0760155A1 A single chip controller-memory device and a memory architecture and methods suitable for implementing the same |
| 03/05/1997 | CN1144385A Dynamic memory |
| 03/04/1997 | US5608844 Neural processor comprising distributed synaptic cells |
| 03/04/1997 | US5608688 DRAM having output control circuit |
| 03/04/1997 | US5608687 Output driver control for ROM and RAM devices |
| 03/04/1997 | US5608686 Synchronous semiconductor memory device with low power consumption |
| 03/04/1997 | US5608684 System and method for RAM power and data backup utilizing a capacitor and ROM |
| 03/04/1997 | US5608683 For a semiconductor memory device |
| 03/04/1997 | US5608682 Semiconductor memory device |
| 03/04/1997 | US5608680 Bit line sense amplifier for restoring and sensing data on a bit line |
| 03/04/1997 | US5608679 Fast internal reference cell trimming for flash EEPROM memory |
| 03/04/1997 | US5608675 In a dynamic random access memory device |
| 03/04/1997 | US5608674 Semiconductor memory device |
| 03/04/1997 | US5608669 Fast internal reference cell trimming for flash EEPROM memory |
| 03/04/1997 | US5608668 Dram wtih open digit lines and array edge reference sensing |
| 03/04/1997 | US5608667 Ferroelectric memory automatically generating biasing pulse for plate electrode |
| 03/04/1997 | US5608250 Volatile memory cell with interface charge traps |
| 03/04/1997 | US5608246 Integration of high value capacitor with ferroelectric memory |
| 02/28/1997 | EP0741422A4 Magnetically controlled logic cell |
| 02/27/1997 | WO1997007550A1 Electrically erasable memory elements characterized by reduced current and improved thermal stability |
| 02/27/1997 | WO1997007543A1 Single deposition layer metal dynamic random access memory |
| 02/27/1997 | WO1997007513A1 Multi-level non-volatile data storage |
| 02/27/1997 | WO1997007512A1 On-chip program voltage generator for antifuse repair |
| 02/27/1997 | WO1997007408A1 Voltage detecting circuit, a power on/off resetting circuit, and a semiconductor device |
| 02/27/1997 | WO1997006947A1 Packing material, base material for adhesive tape, or separator |
| 02/27/1997 | DE19615413A1 Semiconductor integrated circuit device for portable electronic notebook and minicomputer |
| 02/27/1997 | DE19503390C2 Datenausgabepuffer-Steuerschaltung Data output buffer control circuit |
| 02/26/1997 | EP0759662A2 Time multiplexed programmable logic device |
| 02/26/1997 | EP0759622A2 Nonvolatile memory and method of programming the same |
| 02/26/1997 | EP0759621A2 Static random access memory sense amplifier |
| 02/26/1997 | EP0759620A2 Ferroelectric memory devices and method for testing them |
| 02/26/1997 | EP0759619A2 Magnetoresistive element and memory element |
| 02/26/1997 | EP0759618A2 Semiconductor memory device including divisional decoder circuit composed of nmos transistors |
| 02/26/1997 | EP0714545A4 Improved data output buffer |
| 02/26/1997 | EP0497962B1 Sense enable timing circuit for a random access memory |
| 02/26/1997 | CN1143814A Nonvolatile memory and emthod of programming the same |
| 02/26/1997 | CN1143813A High speed synchronous dram |
| 02/25/1997 | US5606717 Memory circuitry having bus interface for receiving information in packets and access time registers |
| 02/25/1997 | US5606528 Semiconductor memory device allowing data rewriting electrically |
| 02/25/1997 | US5606525 Data register structure and semiconductor integrated circuit device using the same |
| 02/25/1997 | US5606523 Non-volatile programmable bistable multivibrator in predefined initial state for memory redundancy circuit |
| 02/23/1997 | CA2179786A1 Static random access memory sense amplifier |
| 02/20/1997 | DE19632830A1 Semiconductor memory device, e.g. burn-in testing device |
| 02/19/1997 | EP0758499A1 Method and apparatus for providing an ultra low power regulated negative charge pump |