Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2010
07/15/2010WO2010080629A1 Balancing a signal margin of a resistance based memory circuit
07/15/2010WO2010080556A1 Charge retention structures and techniques for implementing charge controlled resistors in memory
07/15/2010WO2010080542A1 Spin-transfer torque magnetic random access memory having magnetic tunnel junction with perpendicular magnetic anisotropy
07/15/2010WO2010080512A1 Non-volatile resistance-switching thin film devices
07/15/2010WO2010080510A1 Stt-mram cell structures
07/15/2010WO2010080334A1 Programming a memory cell with a diode in series by applying reverse bias
07/15/2010WO2010080176A1 Mesochronous signaling system with multiple power modes
07/15/2010WO2010080175A1 Signaling system with asymmetrically-managed timing calibration
07/15/2010WO2010080174A1 Mesochronous signaling system with core-clock synchronization
07/15/2010WO2010079881A2 Domain wall movement memory device and an operating method therefor
07/15/2010US20100180140 Data processing system and image processing system
07/15/2010US20100177581 Very Small Swing High Performance Asynchronous CMOS Static Memory (Multi-Port Register File) With Power Reducing Column Multiplexing Scheme
07/15/2010US20100177579 Semiconductor memory device having faulty cells
07/15/2010US20100177574 System and method for mitigating reverse bias leakage
07/15/2010US20100177562 Computer memory device with multiple interfaces
07/15/2010US20100177561 Memory cell having nonmagnetic filament contact and methods of operating and fabricating the same
07/15/2010US20100177560 Non-volatile memory circuit including voltage divider with phase change memory devices
07/15/2010US20100177559 Method for setting pcram devices
07/15/2010US20100177558 Mram having variable word line drive potential
07/15/2010US20100177557 Stt-mram cell structures
07/15/2010US20100177556 Asymmetric static random access memory
07/15/2010US20100177555 Variable resistance nonvolatile storage device
07/15/2010US20100177554 Bipolar cmos select device for resistive sense memory
07/15/2010US20100177553 Rewritable memory device
07/15/2010US20100177552 Table-based reference voltage characterization scheme
07/15/2010US20100177551 Bit set modes for a resistive sense memory cell array
07/15/2010US20100176848 Input/output buffer circuit
07/15/2010US20100176481 Memory Device and Manufacturing Method Thereof
07/15/2010US20100176367 Memory cell having dielectric memory element
07/15/2010DE10300715B4 Halbleiterspeicherbauelement mit Signalverzögerung The semiconductor memory device with signal delay
07/15/2010DE102009040448A1 Halbleitervorrichtung mit mehreren Betriebsmodi A semiconductor device having multiple operating modes
07/15/2010DE102009000124A1 Verfahren zur Speicherung digitaler Information nebst Speicherelement A method of storing digital information along with storage element
07/14/2010EP2207184A1 Automatic hidden refresh in a dram and method therefor
07/14/2010EP2206121A2 Ground level precharge bit line scheme for read operation in spin transfer torque magnetoresistive random access memory
07/14/2010EP2206120A1 Ultrafast magnetic recording element and nonvolatile magnetic random access memory using the magnetic recording element
07/14/2010EP2206119A1 Method for recording of information in magnetic recording element and method for recording of information in magnetic random access memory
07/14/2010CN1627434B Device and method for regulating a magnetic memory cell write current
07/14/2010CN101779373A Dynamic impedance control for input/output buffers
07/14/2010CN101779247A Reducing power consumption during read operations in non-volatile storage
07/14/2010CN101779246A Clock and control signal generation for high performance memory devices
07/14/2010CN101777384A Sensing circuit applied to a programmable resistance type memory material
07/14/2010CN101777380A Method for setting pcram devices
07/14/2010CN101123113B Access method and control device for synchronous dynamic random access memory
07/14/2010CN101122865B Computer mainboard quick suspending and recovery device using phase-change memory
07/13/2010US7755965 Temperature dependent system for reading ST-RAM
07/13/2010US7755956 Non-volatile semiconductor memory and method for replacing defective blocks thereof
07/13/2010US7755950 Programming methods of memory systems having a multilevel cell flash memory
07/13/2010US7755937 Semiconductor device
07/13/2010US7755935 Block erase for phase change memory
07/13/2010US7755934 Resistance change memory device
07/13/2010US7755933 Spin transfer MRAM device with separated CCP assisted writing
07/13/2010US7755932 Spin torque magnetic memory and offset magnetic field correcting method thereof
07/13/2010US7755931 Magnetic random access memory and operation method thereof
07/13/2010US7755930 Semiconductor memory device and magneto-logic circuit
07/13/2010US7755929 Spin-injection device and magnetic device using spin-injection device
07/13/2010US7755928 Semiconductor memory device and semiconductor device group
07/13/2010US7755927 Memory device of SRAM type
07/13/2010US7755926 3-D SRAM array to improve stability and performance
07/13/2010US7755925 Static random access memory
07/13/2010US7755924 SRAM employing a read-enabling capacitance
07/13/2010US7755923 Memory array with read reference voltage cells
07/13/2010US7755922 Non-volatile resistance changing for advanced memory applications
07/13/2010US7755389 Reconfigurable logic structures
07/13/2010US7753508 Ink supply cartridge for a printhead assembly
07/13/2010US7753492 Micro-electromechanical fluid ejection mechanism having a shape memory alloy actuator
07/13/2010US7753485 Ink ejection nozzle with oscillator and shutter arrangement
07/13/2010US7753463 Processing of images for high volume pagewidth printing
07/08/2010WO2010078540A2 Spare block management in non-volatile memories
07/08/2010WO2010078454A1 Variable memory refresh devices and methods
07/08/2010WO2010077846A1 Non-volatile memory and method with continuous scanning time-domain sensing
07/08/2010WO2010077776A1 Self-tuning of signal path delay in circuit employing multiple voltage domains
07/08/2010WO2010077611A1 Digitally-controllable delay for sense amplifier
07/08/2010WO2010077609A1 Data integrity preservation in spin transfer torque magnetoresistive random access memory
07/08/2010WO2010077251A1 An integrated sram and flotox eeprom memory device
07/08/2010WO2010049864A3 Generating and exploiting an asymmetric capacitance hysteresis of ferroelectric mim capacitors
07/08/2010US20100172196 Circuit for Generating Data Strobe Signal in DDR Memory Device and Method Therefor
07/08/2010US20100172174 Semiconductor device having architecture for reducing area and semiconductor system including the same
07/08/2010US20100172173 System And Method To Read And Write Data A Magnetic Tunnel Junction Element
07/08/2010US20100172172 Semiconductor device, semiconductor system including the same, and voltage supply method of semiconductor device
07/08/2010US20100172171 Resistance variable memory apparatus
07/08/2010US20100172170 Variable resistive element, manufacturing method for same, and non-volatile semiconductor memory device
07/08/2010US20100172169 Magnetic structures, information storage devices including magnetic structures, methods of manufacturing and methods of operating the same
07/08/2010US20100171152 Integrated circuit incorporating decoders disposed beneath memory arrays
07/08/2010US20100170951 Image transformation device
07/08/2010DE4232819B4 Dynamischer Speicher Dynamic memory
07/07/2010EP2204813A1 Non-volatile programmable memory
07/07/2010CN1941197B Device for controlling on die termination
07/07/2010CN101771131A Method for fabricating resistive memory device
07/07/2010CN101771068A Semiconductor device and method of manufacturing same
07/07/2010CN101771067A Magnetic memory and driving method as well as manufacturing method thereof
07/07/2010CN101770807A Write optimization circuit for phase change memory and write optimization method thereof
07/07/2010CN101770806A Sense amplifier used in the write operations of SRAM
07/07/2010CN101770805A Read/write margin improvement in SRAM design using dual-gate transistors
07/07/2010CN101770804A Magnetic random access memory, magnetic logic device and spinning microwave oscillator
07/07/2010CN101770803A Magnetic structures, information storage devices including magnetic structures, methods of manufacturing and methods of operating the same
07/07/2010CN101770801A Power distributor, integrated circuit and semiconductor device having the same
07/07/2010CN101770407A Information processing system
07/06/2010US7751267 Half-select compliant memory cell precharge circuit
07/06/2010US7751262 High speed DRAM architecture with uniform access latency
07/06/2010US7751258 Magnetic random access memory