Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
06/1987
06/24/1987EP0226096A2 Multiple-hierarchical-level multiprocessor system
06/24/1987EP0226053A1 Bus arbitration controller
06/23/1987US4675865 Bus interface
06/23/1987US4675864 Serial bus system
06/23/1987US4675843 Programmable logic controller
06/23/1987US4675842 Apparatus for the display and storage of television picture information by using a memory accessible from a computer
06/23/1987US4675813 Program assignable I/O addresses for a computer
06/23/1987US4675812 Priority circuit for channel subsystem having components with diverse and changing requirement for system resources
06/23/1987US4675808 Multiplexed-address interface for addressing memories of various sizes
06/23/1987US4675807 Multiple file transfer to streaming device
06/23/1987CA1223326A1 Data network interface
06/23/1987CA1223323A1 Control channel interface circuit
06/17/1987CN86108261A Data transmission device
06/16/1987US4674037 Data processing system with an enhanced communication control system
06/16/1987US4674032 High-performance pipelined stack with over-write protection
06/16/1987EP0225720A2 Integrated circuit devices
06/10/1987EP0224877A2 Universal module interface
06/10/1987EP0224626A1 Multi-signal processor synchronized system
06/10/1987CN86105650A Channel number priority assignment apparatus
06/09/1987US4672662 Switching system and method for network having a plurality of terminal control equipment units
06/09/1987US4672613 System for transferring digital data between a host device and a recording medium
06/09/1987US4672587 Integratable, bus-oriented transmission system
06/09/1987US4672574 Data communication system with terminal for displaying the coded stream of data being transmitted
06/09/1987US4672570 Network interface module and method
06/09/1987US4672537 Data error detection and device controller failure detection in an input/output system
06/09/1987US4672536 Arbitration method and device for allocating a shared resource in a data processing system
06/09/1987US4672535 Multiprocessor system
06/09/1987US4672457 Scanner system
06/04/1987DE3542040A1 Circuit arrangement for operating a data output device in connection with a data terminal
06/03/1987EP0224149A2 Improved synchronous/asynchronous modem
06/02/1987US4670880 Method of error detection and correction by majority
06/02/1987US4670855 Interchangeable interface circuit structure
06/02/1987US4670666 MOS transistor circuit for shared precharging of bus lines
05/1987
05/27/1987EP0223607A2 Vector processing system
05/27/1987EP0223413A2 Interrupt handling in a multiprocessor computing system
05/27/1987EP0223122A2 Secure component authentication system
05/26/1987US4669079 Method and apparatus for bus arbitration in a data processing system
05/26/1987US4669060 Device associated to a computer for controlling data transfers between a data acquisition system and an assembly comprising a recording and reading apparatus
05/26/1987US4669057 Data collection terminal interrupt structure
05/26/1987US4669056 Data processing system with a plurality of processors accessing a common bus to interleaved storage
05/26/1987US4669044 High speed data transmission system
05/26/1987CA1222325A1 Control structure for a document processing system
05/20/1987EP0222520A2 Bus access interface and method for a computer
05/20/1987EP0222370A2 Method for program loading
05/20/1987EP0222074A2 An arbitration apparatus for determining priority of access to a shared bus
05/19/1987US4667321 Input-output multiplexer-demultiplexer communications channel
05/19/1987US4667305 Circuits for accessing a variable width data bus with a variable width data field
05/19/1987US4667289 Battery-powered computer interface with manual and automatic battery disconnect circuit
05/19/1987US4667193 Addressing system for simultaneously polling plural remote stations
05/19/1987US4667192 Method and apparatus for bus arbitration using a pseudo-random sequence
05/19/1987US4667191 Serial link communications protocol
05/19/1987CA1222035A1 Bus-configured local area network with data exchange capability
05/13/1987EP0221763A2 System for transferring digital data between a host device and a recording medium
05/13/1987EP0221360A2 Digital data message transmission networks and the establishing of communication paths therein
05/13/1987EP0221303A2 Automatic I/O address assignment
05/12/1987US4665522 Multi-channel redundant processing systems
05/12/1987US4665501 Workstation for local and remote data processing
05/12/1987US4665483 Data processing system architecture
05/12/1987US4665482 Data processing system
05/12/1987US4665481 Speeding up the response time of the direct multiplex control transfer facility
05/12/1987US4665480 Data processing system which permits of using the same erasable and programmable memory for instructions and data both in reading and writing
05/12/1987US4665478 Computer system
05/12/1987US4665396 Validation check for remote digital station
05/12/1987CA1221768A1 Signals path control circuitry for a data terminal
05/07/1987WO1987002830A1 Connector interface
05/06/1987EP0220731A2 A method of distributed file recovery and a system using the method
05/06/1987EP0220536A2 Method of arbitrating access to a shared resource among a plurality of uniquely identified processors
05/06/1987EP0220386A2 Medical environment communication system
05/05/1987US4663756 Multiple-use priority network
05/05/1987US4663728 Read/modify/write circuit for computer memory operation
05/05/1987US4663708 Synchronization mechanism for a multiprocessing system
05/05/1987US4663706 Multiprocessor multisystem communications network
05/05/1987US4663620 Modified crossbar switch operation with fixed priority conflict resolution and apparatus for performing same
05/05/1987CA1221464A1 Data processor system having improved data throughput of multiprocessor system
04/1987
04/29/1987CN85107738A Control device of swich
04/28/1987US4661905 Bus-control mechanism
04/28/1987US4661900 Flexible chaining in vector processor with selective use of vector registers as operand and result registers
04/28/1987US4661659 Wireless phone system communicatively combined with a computer
04/28/1987EP0127656A4 A telephone switching arrangement.
04/28/1987EP0126768A4 A memory cartridge for connection to a telephone switching arrangement.
04/28/1987EP0112912A4 I/o channel bus.
04/28/1987CA1221173A1 Microcomputer system with bus control means for peripheral processing devices
04/23/1987WO1987002488A1 Multi-port memory system
04/22/1987EP0218955A1 Method for synchronous bit and byte data transfer on a serial interface
04/22/1987EP0218859A2 Signal processor communication interface
04/22/1987CN86106515A Communication interface for signal processor
04/21/1987US4660169 Access control to a shared resource in an asynchronous system
04/21/1987US4659877 Verbal computer terminal system
04/21/1987CA1220831A1 Bus arrangement for addressing equipment units and a method therefor
04/15/1987EP0218426A2 Bus interface
04/15/1987EP0218424A2 Interrupt control system
04/15/1987EP0217925A1 Redundant termination of a communication line
04/15/1987CN85105547A Memory access control system for an information processing apparatus
04/14/1987US4658356 Control system for updating a change bit
04/14/1987US4658353 System control network for multiple processor modules
04/14/1987US4658349 Direct memory access control circuit and data processing system using said circuit
04/14/1987US4658333 Variable length backplane bus
04/14/1987US4658250 Computer network operating method and apparatus for detecting and exploiting data collisions to merge read transactions
04/08/1987EP0217538A2 A front loading apparatus
04/08/1987EP0217486A2 A synchronizing system