Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
03/1996
03/26/1996US5502816 Method of routing a request for a virtual circuit based on information from concurrent requests
03/26/1996US5502766 Data enclave and trusted path system
03/26/1996US5502543 System for collecting statistical data on remotely monitored machines
03/26/1996US5502414 Circuit for delaying data latching from a precharged bus and method
03/21/1996WO1996008775A1 Software programmable bus disable system
03/21/1996WO1996008774A1 Bus assignment system for dsp processors
03/21/1996WO1996008773A2 Pcmcia dma data bus mastering
03/21/1996WO1996008771A1 Implementation of timing between a microprocessor and its peripheral devices
03/21/1996WO1996008768A1 Microcontroller conditionally skips updating latch for msb and directly drives lsb of memory address
03/21/1996WO1996008759A1 Micro personal digital assistant
03/21/1996WO1996008756A1 Secure computer network
03/20/1996EP0702470A1 Method and arrangement to control a data network
03/20/1996EP0702319A2 A method of downsampling documents
03/20/1996EP0702308A1 System for implementing high speed peripheral bus
03/20/1996EP0702307A1 Multibus dynamic arbiter
03/20/1996EP0702306A1 System and method for interfacing risc busses to peripheral circuits using another template of busses in a data communication adapter
03/20/1996EP0702289A1 A method of automatically recognizing a language in which digital data are received
03/20/1996EP0701754A1 Interconnection of local communication bus systems
03/20/1996EP0701515A1 Method of cyclically transferring data between at least two separately operating control apparatus
03/20/1996CN1118959A A semiconductor memory based server for providing multimedia information on demand over wide area networks
03/20/1996CN1118900A Improved reset signal generation method and aparatus for use with a microcomputer
03/19/1996US5500946 Integrated dual bus controller
03/19/1996US5500945 Apparatus and method for controlling a system bus of a multiprocessor system
03/19/1996US5500919 Graphics user interface for controlling text-to-speech conversion
03/19/1996US5500864 Checksum calculation unit and method for error detection on data packets
03/19/1996US5500860 Router using multiple hop redirect messages to enable bridge like data forwarding
03/19/1996US5500859 Voice and data transmission system
03/19/1996US5500830 Memory access device
03/19/1996US5500827 Method and apparatus for improved DRAM refresh operation
03/14/1996WO1996008110A1 Peripheral video conferencing system
03/14/1996WO1996008109A1 System and method for selectively distributing commercial messages over a communications network
03/14/1996WO1996008095A1 Method and apparatus for electronic distribution of digital multi-media information
03/14/1996WO1996007971A1 Method and apparatus for automatically configuring an interface
03/14/1996WO1996007970A1 Method and apparatus for performing deferred transactions
03/14/1996CA2199177A1 System and method for selectively distributing commercial messages over a communications network
03/13/1996EP0701370A1 Online placement of video files on disks in a server environment
03/13/1996EP0701354A1 TCP/IP header compression in X.25 networks
03/13/1996EP0701216A1 Data processing system having a high speed burst access
03/13/1996EP0701215A1 An improved digital communication I/O port
03/13/1996EP0701214A1 Multi-tasking processing system
03/13/1996EP0701210A2 Data processor having data bus and instruction fetch bus provided separately from each other
03/13/1996EP0701205A2 Method and apparatus for space-efficient inter-process communication
03/13/1996EP0701193A1 Expanded mode microcontroller
03/13/1996EP0700541A1 Process and arrangement for operating a bus system
03/13/1996EP0700540A1 Pipelined data ordering system
03/13/1996EP0700539A1 Input/output emulation system
03/13/1996CN1118478A Method and apparatus for providing accurate and complete communication between different bus architectures in an information handling system
03/13/1996CN1118477A Multi-protocol data bus system
03/13/1996CN1118476A Apparatus and method for interrupt processing
03/13/1996CN1118475A Method and apparatus for interfacing with RAM
03/13/1996CN1118464A Interface method and device in digital signal processing system
03/12/1996US5499385 Method for accessing and transmitting data to/from a memory in packets
03/12/1996US5499384 Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device
03/12/1996US5499383 DMA control device controlling sequential storage of data
03/12/1996US5499381 Electronic apparatus with interchangeable peripheral device and a processor interrupt feature
03/12/1996US5499379 Computer system
03/12/1996US5499378 Small computer system emulator for non-local SCSI devices
03/12/1996US5499374 Event driven communication network
03/12/1996US5499372 Method of controlling access to restricted access data and communication system therefor
03/12/1996US5499353 Cache address strobe control logic for stimulated bus cycle initiation
03/12/1996US5499346 Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus
03/12/1996US5499345 Bus arbitration system
03/12/1996US5499344 Programmable dual port data unit for interfacing between multiple buses
03/12/1996US5499338 Bus system having a system bus, an internal bus with functional units coupled therebetween and a logic unit for use in such system
03/12/1996US5499297 System and method for trusted path communications
03/12/1996US5498990 Reduced CMOS-swing clamping circuit for bus lines
03/12/1996US5498981 Ready signal control apparatus capable of automatically deactivating ready signal
03/12/1996US5498886 Circuit module redundancy architecture
03/12/1996CA1338155C Bidirection buffer with latch and parity capability
03/07/1996WO1996007281A1 Network management system for communications networks
03/07/1996WO1996007257A2 Scalable distributed computing environment
03/07/1996WO1996007143A1 Dual-microprocessor module having two microprocessors each capable of operating in independent mode and cooperative mode
03/07/1996WO1996007142A1 A peripheral card having an adaptive pcmcia compliant interface
03/07/1996WO1996007141A1 Method for selecting transmission preferences
03/07/1996WO1996007139A1 A multi-port memory system including read and write buffer interfaces
03/07/1996WO1996007136A1 Operating system device driver autogeneration
03/07/1996WO1996007132A1 Method and apparatus for synchronized transmission of data between a network adaptor and multiple transmission channels
03/07/1996CA2197324A1 Scalable distributed computing environment
03/07/1996CA2174762A1 Method for selecting transmission preferences
03/06/1996EP0700231A2 Methods and systems for interprocess communication and inter-network data transfer
03/06/1996EP0700018A2 Interactive picture providing method
03/06/1996EP0700004A2 System and method for communicating between devices
03/06/1996EP0700003A2 Data processor with controlled burst memory accesses and method therefor
03/06/1996EP0700002A1 Modular chip select control circuit and related circuit and methods
03/06/1996EP0700001A1 Integrated circuit microprocessor with programmable memory access interface types and related method
03/06/1996EP0699330A1 Gps explorer
03/06/1996EP0699322A1 Control module for reducing ringing in digital signals on a transmission line
03/05/1996US5497501 DMA controller using a predetermined number of transfers per request
03/05/1996US5497498 Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformation
03/05/1996US5497491 System and method for importing and exporting data between an object oriented computing environment and an external computing environment
03/05/1996US5497490 Automatic reconfiguration of alterable systems
03/05/1996US5497481 Microcomputer computer system having plural programmable timers and preventing memory access operations from interfering with timer start requests
03/05/1996US5497480 Broadcast demap for deallocating memory pages in a multiprocessor system
03/05/1996US5497479 Method and apparatus for remotely controlling and monitoring the use of computer software
03/05/1996US5497476 Scatter-gather in data processing system
03/05/1996US5497471 High performance computer system which minimizes latency between many high performance processors and a large amount of shared memory
03/05/1996US5497466 Universal address generator
03/05/1996US5497463 Ally mechanism for interconnecting non-distributed computing environment (DCE) and DCE systems to operate in a network system
03/05/1996US5497362 Drive interface for performing write/read of information
03/05/1996US5497284 Method and device for the protection of a series bus against short circuits
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