Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
09/1996
09/17/1996US5557755 Method and system for improving bus utilization efficiency
09/17/1996US5557754 Computer system and system expansion unit
09/17/1996US5557753 Information processing unit
09/17/1996US5557752 Telecommunications interface apparatus and method
09/17/1996US5557751 Method and apparatus for serial data communications using FIFO buffers
09/17/1996US5557750 Prefetch/prestore mechanism for peripheral controllers with shared internal bus
09/17/1996US5557744 Multiprocessor system including a transfer queue and an interrupt processing unit for controlling data transfer between a plurality of processors
09/17/1996US5557739 Computer system with component removal and replacement control scheme
09/17/1996US5557734 Cache burst architecture for parallel processing, such as for image processing
09/17/1996US5557726 Method and apparatus for a remote groupware operating system
09/17/1996US5557482 Multipath channel apparatus and method for data storage devices and communications systems wherein a data path is selected based on errors
09/17/1996CA2068805C Acquiring the identification of a node in a data processing input/output system
09/12/1996WO1996027994A1 Communication system including method and apparatus for maintaining communications with a mobile terminal
09/12/1996WO1996027989A1 Interactive system for a closed cable network including an internet gateway and linked services
09/12/1996WO1996027836A1 System and method for expansion of a computer
09/12/1996WO1996027835A1 Service management operation and support system and method________________________________________________________________________
09/12/1996WO1996027828A1 I/o expansion device and apparatus using the same
09/12/1996WO1996010904A3 Digital signal processor
09/12/1996DE19602136A1 Document verification system with server subsystem
09/12/1996CA2214725A1 Service management operation and support system and method
09/12/1996CA2214650A1 Interactive system for a closed cable network including an internet gateway and linked services
09/11/1996EP0731561A1 A driver for interfacing integrated circuits to transmission lines
09/11/1996EP0731412A1 Electronic device for computer
09/11/1996EP0731404A1 A universal electronic video game renting/distributing system
09/11/1996EP0730807A1 Method and apparatus for downloading information
09/11/1996EP0730763A1 Object-oriented system and method for hardware configuration
09/10/1996US5555560 For a data processing system
09/10/1996US5555559 Microprocessor capable of ensuring flexible recovery time for I/O device by inserting idle states
09/10/1996US5555545 Connecting apparatus for interconnection between serial data transmission devices
09/10/1996US5555540 ASIC bus structure
09/10/1996US5555513 Data processing system having a compensation circuit for compensating for capacitive coupling on a bus
09/10/1996US5555510 Automatic computer card insertion and removal algorithm
09/10/1996US5555441 Interactive audiovisual distribution system
09/10/1996US5555440 Parallel interface for connecting data processing devices to one another over bidirectional control lines
09/10/1996US5555438 Method for synchronously transferring serial data to and from an input/output (I/O) module with true and complement error detection coding
09/10/1996US5555436 Apparatus for allowing multiple parallel port devices to share a single parallel port
09/10/1996US5555435 Automatic language boundary identification for a peripheral unit that supports multiple control languages
09/10/1996US5555433 Circuit for interfacing data busses
09/10/1996US5555430 Interrupt control architecture for symmetrical multiprocessing system
09/10/1996US5555427 Distributed processing in a system of computers at terminals connected by a communication network
09/10/1996US5555425 Multi-master bus arbitration system in which the address and data lines of the bus may be separately granted to individual masters
09/10/1996US5555420 Multiprocessor programmable interrupt controller system with separate interrupt bus and bus retry management
09/10/1996US5555416 Automated software installation and operating environment configuration for a computer system based on classification rules
09/10/1996US5555414 Multiprocessing system including gating of host I/O and external enablement to guest enablement at polling intervals
09/10/1996US5555401 Self configuring device system
09/10/1996US5555383 Peripheral component interconnect bus system having latency and shadow timers
09/10/1996US5555382 In a multiprocessor system
09/10/1996US5555381 Microcomputer architecture utilizing an asynchronous bus between microprocessor and industry standard synchronous bus
09/10/1996US5555380 Data transfer system with buffer request including block length to update the buffer pointer prior to transferring of the block
09/10/1996US5555375 Method and apparatus for network computer systems management group administration
09/10/1996US5555374 System and method for coupling a plurality of peripheral devices to a host computer through a host computer parallel port
09/10/1996US5555351 Host communication message manager for a label printing system with data collection capabilities
09/10/1996CA2071333C Method and apparatus for synchronizing the readout of a sequential media device with a separate clocked device
09/10/1996CA2007644C Common bus control method
09/06/1996WO1996027174A1 Security device
09/06/1996WO1996027159A1 Reprogrammable pcmcia card
09/06/1996WO1996027156A1 Interrupt steering for a computer system
09/06/1996WO1996027155A2 Systems and methods for secure transaction management and electronic rights protection
09/06/1996CA2683230A1 Systems and methods for secure transaction management and electronic rights protection
09/04/1996EP0730239A2 Method and apparatus for telephone modification of documents
09/04/1996EP0730236A1 Method and circuit for the capture and transmission of video data in a PC
09/04/1996EP0730235A1 Improved direct memory access controller having programmable timing
09/04/1996EP0730234A2 Bus master arbitration circuitry having multiple arbiters
09/04/1996EP0729618A1 Network management system having virtual catalog overview of files distributively stored across network domain
09/04/1996EP0729615A1 Method and apparatus for achieving high speed data transfer from a parallel port
09/04/1996EP0729613A1 Microcontroller conditionally skips updating latch for msb and directly drives lsb of memory address
09/03/1996US5553310 Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems
09/03/1996US5553308 Serial communication format and methodology
09/03/1996US5553307 Method and device for transferring noncontiguous blocks in one transfer start by creating bit-map indicating which block is to be transferred
09/03/1996US5553306 Method and apparatus for controlling parallel port drivers in a data processing system
09/03/1996US5553302 Serial I/O channel having independent and asynchronous facilities with sequence recognition, frame recognition, and frame receiving mechanism for receiving control and user defined data
09/03/1996US5553300 Semiconductor microscope data interface for computer
09/03/1996US5553293 Interprocessor interrupt processing system
09/03/1996US5553289 System for automatically assigning attributes to objects of multimedia distribution when the objects being within a predetermined relationship
09/03/1996US5553287 In a computer system
09/03/1996US5553271 Auto-detect system and method for data communication
09/03/1996US5553268 Memory operations priority scheme for microprocessors
09/03/1996US5553252 Device for controlling data transfer between chips via a bus
09/03/1996US5553251 Centralized management system utilizing a bus interface unit
09/03/1996US5553250 Bus terminating circuit
09/03/1996US5553249 Dual bus adaptable data path interface system
09/03/1996US5553248 System for awarding the highest priority to a microprocessor releasing a system bus after aborting a locked cycle upon detecting a locked retry signal
09/03/1996US5553247 Method for unblocking a multibus multiprocessor system
09/03/1996US5553246 Shared bus mediation system for multiprocessor system
09/03/1996US5553244 Reflexively sizing memory bus interface
09/03/1996US5553241 Connection-oriented communication system with communication path re-establishment mechanism
09/03/1996US5553233 Management apparatus for volume-medium correspondence information for use in dual file system
09/03/1996US5553085 Method and apparatus for generating a 48-bit frame check sequence
09/03/1996US5553083 Method for quickly and reliably transmitting frames of data over communications links
09/03/1996US5553073 Token ring network
09/03/1996US5553059 Network interface unit remote test pattern generation
09/03/1996US5553031 Direct memory access method
09/03/1996US5553005 Video server memory management method
09/03/1996US5552959 Notebook computer docking station having floating connector interface structure
09/03/1996US5552901 Facsimile server system comprising a facsimile server and at least one remote facsimile
09/03/1996US5551701 Reconfigurable video game controller with graphical reconfiguration display
09/03/1996CA2011388C Interrupt controller for multiprocessor systems
08/1996
08/29/1996WO1996026489A1 Method and apparatus for interfacing between peripherals of multiple formats and a single system bus
08/29/1996WO1996026488A1 System management shadow port
08/29/1996WO1996017466A3 Communication system for multiservice terminals
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