Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
08/1996
08/28/1996EP0729255A2 Method for automatic adaptation of interface parameters
08/28/1996EP0729253A2 Method for deleting managed objects from network
08/28/1996EP0729104A2 A data transfer control device for controlling data transfer between shared memories of clusters
08/28/1996EP0729098A2 Information storage controller
08/28/1996EP0729094A1 A mixed-endian computing environment for a conventional bi-endian computer system
08/28/1996EP0729093A1 A mixed-endian computer system
08/28/1996EP0728581A2 Bus system for a printing machine
08/28/1996EP0728392A1 Communication system with a network comprising an administrative unit
08/28/1996EP0728334A1 Scsi-coupled module for monitoring and controlling scsi-coupled raid bank and bank environment
08/28/1996EP0728333A1 Data backup and restore system for a computer network
08/28/1996EP0672282B1 Concurrent framework system
08/28/1996CN1129881A Method for transmitting MPEG-compressed data and apparatus for performing the same
08/27/1996US5551054 Page mode buffer controller for transferring Nb byte pages between a host and buffer memory without interruption except for refresh
08/27/1996US5551052 Data bus protocol for high speed chip to chip data transfer
08/27/1996US5551044 Method and apparatus for interrupt/SMI# ordering
08/27/1996US5551038 Directory based computer environment
08/27/1996US5551034 System for synchronizing replicated tasks
08/27/1996US5551032 Method for file transfer
08/27/1996US5551012 Single socket upgradeable computer motherboard with automatic detection and socket reconfiguration for inserted CPU chip
08/27/1996US5551010 Arithmetic operation unit and memory accessing device for accessing primary and secondary cache memories independently of a CPU
08/27/1996US5551007 Method for controlling multiple common memories and multiple common memory system
08/27/1996US5551000 I/O cache with dual tag arrays
08/27/1996US5550997 In an interactive network board, a method and apparatus for preventing inadvertent loading of a programmable read only memory
08/27/1996US5550991 Personal computer system having high speed local processor bus and storage controller with FIFO memory coupled directly thereto
08/27/1996US5550990 Physical partitioning of logically continuous bus
08/27/1996US5550989 Bridge circuit that can eliminate invalid data during information transfer between buses of different bitwidths
08/27/1996US5550988 Apparatus and method for performing error correction in a multi-processor system
08/27/1996US5550987 Data transfer device
08/27/1996US5550984 Security system for preventing unauthorized communications between networks by translating communications received in ip protocol to non-ip protocol to remove address and routing services information
08/27/1996US5550980 Networked facilities management system with optical coupling of local network devices
08/27/1996US5550957 Multiple virtual printer network interface
08/27/1996US5550861 Modular PCMCIA modem and pager
08/27/1996US5550826 Communication protocol for communicating image data
08/27/1996US5550710 Computer system module
08/27/1996US5550533 High bandwidth self-timed data clocking scheme for memory bus implementation
08/27/1996CA2001298C Input and output processing system for a virtual computer
08/22/1996WO1996025822A2 Multi-channel common-pool distributed data storage and retrieval system
08/22/1996WO1996025708A1 Arrangement for serial data transmission
08/22/1996WO1996018941A3 Method and apparatus to secure distributed digital directory object changes
08/21/1996EP0727909A2 Interface for audio/video subscriber equipment and telecommunications line
08/21/1996EP0727747A2 ASIC bus structure
08/21/1996EP0727739A1 Object-oriented programming interface for developing and running network management applications on a network communication infrastructure
08/21/1996EP0727071A1 Relational data base control system using object-oriented access logic to limit the data base access count, and method therefor
08/21/1996EP0727069A1 Method for selecting transmission preferences
08/21/1996EP0727048A1 System interface fault isolator test set
08/21/1996CN1129506A Home services delivery system with intelligent terminal emulator
08/21/1996CN1129481A Data bus
08/20/1996US5548797 Digital clock pulse positioning circuit for delaying a signal input by a fist time duration and a second time duration to provide a positioned clock signal
08/20/1996US5548794 Data processor and method for providing show cycles on a fast multiplexed bus
08/20/1996US5548791 Input/output control system with plural channel paths to I/O devices
08/20/1996US5548790 High speed IEEE 488 bus data transfer system
08/20/1996US5548787 Bus cycle timing control circuit having bus cycle enable/disable signal dictated by count means using comparison of predetermined and destination addresses for initial count
08/20/1996US5548786 Dynamic bus sizing of DMA transfers
08/20/1996US5548783 Composite drive controller including composite disk driver for supporting composite drive accesses and a pass-through driver for supporting accesses to stand-alone SCSI peripherals
08/20/1996US5548782 Apparatus for preventing transferring of data with peripheral device for period of time in response to connection or disconnection of the device with the apparatus
08/20/1996US5548780 Computer implemented method
08/20/1996US5548779 System for providing system services for a device to a client using stack definition and stack description of a stack having top, intermediate, and bottom service objects
08/20/1996US5548777 Interface control system for a CD-ROM driver by memory mapped I/O method having a predetermined base address using an ISA BUS standard
08/20/1996US5548767 Method and apparatus for streamlined handshaking between state machines
08/20/1996US5548766 Microprocessor for selecting data bus terminal width regardless of data transfer mode
08/20/1996US5548762 Implementation efficient interrupt select mechanism
08/20/1996US5548746 Non-contiguous mapping of I/O addresses to use page protection of a process
08/20/1996US5548735 System and method for asynchronously processing store instructions to I/O space
08/20/1996US5548734 Equal length symmetric computer bus topology
08/20/1996US5548733 Method and apparatus for dynamically controlling the current maximum depth of a pipe lined computer bus system
08/20/1996US5548732 Computer system
08/20/1996US5548731 System for forwarding data packets with different formats to different software entitles respectively based upon match between portion of data packet and filter
08/20/1996US5548730 Intelligent bus bridge for input/output subsystems in a computer system
08/20/1996US5548729 System for automatically generating and saving control information in a server if requested by a client at system initialization for operating in a network
08/20/1996US5548728 System for reducing bus contention using counter of outstanding acknowledgement in sending processor and issuing of acknowledgement signal by receiving processor to indicate available space in shared memory
08/20/1996US5548727 System for selectively using default protocol without negotiation for first regular communication and appropriate protocol after receiving protocol information embedded in the established communication
08/20/1996US5548726 System for activating new service in client server network by reconfiguring the multilayer network protocol stack dynamically within the server node
08/20/1996US5548725 System for transmitting command and/or data in a single packet and automatically reporting status a predetermined time after receiving a command
08/20/1996US5548723 Object-oriented network protocol configuration system utilizing a dynamically configurable protocol stack
08/20/1996US5548712 Data storage system and method for managing asynchronous attachment and detachment of storage disks
08/20/1996US5548623 Null words for pacing serial links to driver and receiver speeds
08/20/1996US5548622 Method and structure for synchronization of asynchronous signals
08/20/1996US5548620 Zero latency synchronized method and apparatus for system having at least two clock domains
08/20/1996US5548589 Connectionless communication system and method of connectionless communication
08/20/1996US5548304 Method and apparatus for screen displaying
08/20/1996US5548226 Fast transmission line implemented with receiver, driver, terminator and IC arrangements
08/20/1996US5547386 Apparatus adapted for coaction with a number of circuit boards
08/20/1996CA2069710C Compensation for mismatched transport protocols in a data communications network
08/20/1996CA2036066C Bus control system
08/15/1996WO1996024899A1 Arrangement and method in communications management and a telecommunications system with a managing arrangement
08/15/1996CA2209912A1 Arrangement and method in communications management and a telecommunications system with a managing arrangement
08/14/1996EP0726653A1 Bus maintenance circuit
08/14/1996EP0726624A1 Interface device
08/14/1996EP0726528A1 Interconnection network for a multi-nodal data processing system
08/14/1996EP0726527A1 Peripheral unit interface apparatus enabling hot insertion/removal
08/14/1996EP0726523A2 Method for maintaining memory coherency in a computer system having a cache
08/14/1996EP0726519A1 Operating system based remote communication system
08/14/1996EP0726004A1 Object-oriented rule-based protocol system
08/14/1996EP0726003A1 Object-oriented network protocol configuration system
08/14/1996EP0725950A1 Object-oriented remote procedure call networking system
08/14/1996EP0537287A4 Method and coupler for interfacing a portable data carrier with a host processor
08/14/1996DE19504136A1 Master and slave unit arrangement
08/14/1996CA2168087A1 Operating system based remote communication system
08/13/1996US5546600 Data driven computer producing inhibit signal for inhibiting merging external provided data pieces with internal data pieces when number of processing data exceeds reference value
08/13/1996US5546595 Object-oriented system using objects representing hardware devices, physical connectors and connections between the physical connectors for configuring a computer