Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
08/1995
08/15/1995US5442802 Asynchronous co-processor data mover method and means
08/15/1995US5442800 Parallel input-output circuit permitting reduce number of pins in a single chip microcomputer
08/15/1995US5442777 Firmware trace data acquisition method
08/15/1995US5442773 Instruction control method and instruction control apparatus
08/15/1995US5442772 Common breakpoint in virtual time logic simulation for parallel processors
08/15/1995US5442764 Digital signal processing having improved execution efficiency
08/15/1995US5442755 Multi-processor system with lock address register in each processor for storing lock address sent to bus by another processor
08/15/1995US5442754 Receiving control logic system for dual bus network
08/15/1995US5442753 Circuitry for providing replica data transfer signal during DMA verify operations
08/15/1995US5442750 System for transmitting data between systems using selected subsets of plural interconnecting bus lines and including selection of a compatible transmission speed
08/15/1995US5442749 Network video server system receiving requests from clients for specific formatted data through a default channel and establishing communication through separate control and data channels
08/15/1995US5442633 Shortcut network layer routing for mobile hosts
08/15/1995US5442376 Handling multiple command recognition inputs in a multi-tasking graphical environment
08/15/1995US5442342 Distributed user authentication protocol
08/15/1995US5442339 Method and system of changing destination of protocol data unit in hierarchical data communication network systems
08/15/1995CA2042872C Method and means for accessing dasd arrays with tuned data transfer rate and concurrency
08/15/1995CA2020520C Apparatus and method for preventing unauthorized modification to bios in a personal computer system
08/10/1995WO1995021414A1 Communications architecture and buffer for distributing information services
08/10/1995WO1995013581A3 Scsi-coupled module for monitoring and controlling scsi-coupled raid bank and bank environment
08/10/1995DE4445310A1 Programmable I=O port for micro-computer system
08/10/1995DE4439775A1 Bus interface circuit for FIFO
08/10/1995DE4401465A1 Kommunikationsmodul Communication module
08/10/1995DE19501674A1 Interface circuit for management of data transfer between processor
08/09/1995EP0666680A2 Two-line telephone controller
08/09/1995EP0666667A2 Performance and status monitoring in a computer network
08/09/1995EP0666666A2 Method and apparatus for improved throughput in a multi-node communication system with a shared resource
08/09/1995EP0666665A2 Method and apparatus for dynamically determining and allocating shared resource access quota
08/09/1995EP0666653A1 Input/output data ports
08/09/1995EP0666620A2 Connection device for the wiring of data networks
08/09/1995EP0666550A1 Data exchange system comprising portable data processing units
08/09/1995EP0666541A1 Apparatus and method for operating chips synchronously at speeds exceeding the bus speed
08/09/1995EP0666540A1 Method and apparatus to record and playback digital data
08/09/1995EP0666530A2 Periodic system management interrupt source and power management system employing the same
08/09/1995EP0666529A1 Power management in an asynchronus receiver/transmitter
08/09/1995EP0666199A1 Interface circuit between two different busses in a vehicle
08/09/1995EP0666005A1 Termination arrangement at an interface at one end of the connectable and disconnectable multi-conductor cable
08/08/1995US5440755 Computer system with a processor-direct universal bus connector and interchangeable bus translator
08/08/1995US5440754 Work station and method for transferring data between an external bus and a memory unit
08/08/1995US5440752 Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU
08/08/1995US5440751 Burst data transfer to single cycle data transfer conversion and strobe signal conversion
08/08/1995US5440747 Data processor with control logic for storing operation mode status and associated method
08/08/1995US5440744 Methods and apparatus for implementing server functions in a distributed heterogeneous environment
08/08/1995US5440729 Method for handling error information between channel unit and central computer
08/08/1995US5440719 Method simulating data traffic on network in accordance with a client/sewer paradigm
08/08/1995US5440713 M-way N-port paged-interleaved memory system
08/08/1995US5440708 Microprocessor and storage management system having said microprocessor
08/08/1995US5440699 System by which a remote computer receives screen images from and transmits commands to a host computer
08/08/1995US5440698 Arbitration of packet switched busses, including busses for shared memory multiprocessors
08/08/1995US5440697 Method and apparatus for simulating I/O devices
08/08/1995US5440696 Data processing device for reducing the number of internal bus lines
08/08/1995US5440695 Input/output module having a combination input/output point
08/08/1995US5440694 Interface circuit for allowing receiving serial data input after receiving serial input suspension signal
08/08/1995US5440691 System for minimizing underflowing transmit buffer and overflowing receive buffer by giving highest priority for storage device access
08/08/1995US5440690 Network adapter for interrupting host computer system in the event the host device driver is in both transmit and receive sleep states
08/08/1995US5440689 Interprocessor communication system for direct processor to processor communication between internal general purpose registers transparent to the execution of processors thereof
08/08/1995US5440687 Communication protocol for handling arbitrarily varying data strides in a distributed processing environment
08/08/1995US5440633 Communication network access method and system
08/08/1995US5440558 Data link setup in connection-oriented local area network with floating administration of data link addresses
08/08/1995US5440523 Multiple-port shared memory interface and associated method
08/03/1995WO1995020853A1 Networking module and method for fault-tolerant transmission of system management information
08/03/1995WO1995020852A1 Distributed chassis agent for network management
08/03/1995WO1995020850A1 Network having secure fast packet switching and guaranteed quality of service
08/02/1995EP0665670A2 Remote file transfer method and apparatus
08/02/1995EP0665668A2 Timeout process circuit and receiver including this timeout process circuit
08/02/1995EP0665502A1 Asynchronous serial control circuit
08/02/1995EP0665501A1 Bus master arbitration circuitry with retry mechanism
08/02/1995EP0665500A1 Bus master arbitration circuitry with retry mechanism
08/02/1995EP0665494A1 Method for simulation of a server architecture using a client architecture
08/02/1995EP0665490A2 SCSI disk drive power down apparatus
08/02/1995EP0664907A1 Disk array controller utilizing command descriptor blocks for control information
08/02/1995EP0664906A1 Network station with multiple network addresses
08/02/1995EP0369022B1 Parallel signal processing system
08/01/1995USH1472 Computer interface adapter for supporting data communication between a parallel signal device and a serial signal device
08/01/1995US5438675 Initialization system for input/output processing units
08/01/1995US5438671 Method and system for transferring compressed bytes of information between separate hard disk drive units
08/01/1995US5438667 Method for data transmission and apparatus for implementation of this method
08/01/1995US5438666 Shared memory bus system for arbitrating access control among contending memory refresh circuits, peripheral controllers, and bus masters
08/01/1995US5438665 Direct memory access controller for handling cyclic execution of data transfer in accordance with stored transfer control information
08/01/1995US5438663 External interface for a high performance graphics adapter allowing for graphics compatibility
08/01/1995US5438658 Method and system for time critical response management in a data processing system
08/01/1995US5438576 Data communication apparatus and method including means for and step of adding dummy character as a new last character of data to be transmitted
08/01/1995US5438281 Semiconductor integrated circuit device and data processing system having an interface with reduced parasitic capacitance
08/01/1995CA2021234C Circuit for interfacing a digital signal processor to a serial interface controller
07/1995
07/29/1995CA2140685A1 Bus master arbitration circuitry having improved prioritization
07/29/1995CA2140582A1 Scsi disk drive power down apparatus
07/27/1995WO1995020282A1 TRANSPARENT INTERCONNECTOR OF LANs BY AN ATM NETWORK
07/27/1995WO1995020194A1 Communication module
07/27/1995WO1995020193A1 Improved bus protocol using separate clocks for arbitration and data transfer
07/27/1995WO1995020192A1 Bus deadlock avoidance during master split-transactions
07/27/1995WO1995020191A1 System and method for coordinating access to a bus
07/27/1995WO1995020190A1 Method and system for pipelining bus requests
07/27/1995CA2181535A1 Transparent interconnector of lans by an atm network
07/26/1995EP0664612A1 Noise filter
07/26/1995EP0664515A1 Apparatus and method for automatic sense and establishment of voltage-signalling modes
07/26/1995EP0664514A1 Apparatus and method for integrating bus master ownership of local bus load
07/26/1995EP0664513A1 Integrated SCSI and ethernet controller on PCI local bus
07/26/1995EP0664507A2 Method and system for providing protected mode device drivers
07/26/1995EP0664036A1 Flexible network system.
07/26/1995EP0664032A1 Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems
07/26/1995EP0664031A1 Prioritization of microprocessors in multiprocessor computer systems.
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