| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 01/17/1996 | EP0692760A2 Data processing apparatus |
| 01/17/1996 | EP0692118A1 Device for a digital signal processor backplane for matching a fast processor to slow components |
| 01/17/1996 | EP0692117A1 Ultra high speed parallel data fusion system |
| 01/17/1996 | CN1030743C Frame restructuring interface for digital bit streams multiplexed by time-division multiplexing digital tributaries with different bit rates |
| 01/16/1996 | US5485634 Method and system for the dynamic selection, allocation and arbitration of control between devices within a region |
| 01/16/1996 | US5485624 Co-processor monitoring address generated by host processor to obtain DMA parameters in the unused portion of instructions |
| 01/16/1996 | US5485602 Integrated circuit having a control signal for identifying coinciding active edges of two clock signals |
| 01/16/1996 | US5485594 Apparatus and method using an atomic fetch and add for establishing temporary ownership of a common system resource in a multiprocessor data processing system |
| 01/16/1996 | US5485593 Data structure access control circuit and method utilizing tag bits indicating address match and memory fullness conditions |
| 01/16/1996 | US5485591 Microprocessor wherein the number of register output signal liner connected to the buses are reduced reducing the load capacity of the buses |
| 01/16/1996 | US5485590 Programmable controller communication interface module which is configurable by a removable memory cartridge |
| 01/16/1996 | US5485586 Queue based arbitration using a FIFO data structure |
| 01/16/1996 | US5485585 Personal computer with alternate system controller and register for identifying active system controller |
| 01/16/1996 | US5485584 Apparatus for simulating a stack structure using a single register and a counter to provide transmit status in a programmed I/O ethernet adapter with early interrupts |
| 01/16/1996 | US5485582 Transfer control unit, processor element and data transferring method |
| 01/16/1996 | US5485579 Multiple facility operating system architecture |
| 01/16/1996 | US5485576 Chassis fault tolerant system management bus architecture for a networking |
| 01/16/1996 | US5485570 Display station controller |
| 01/16/1996 | US5485460 System and method for running multiple incompatible network protocol stacks |
| 01/16/1996 | US5485458 Bus interconnect circuit including port control logic for a multiple node communication network |
| 01/16/1996 | US5485455 Network having secure fast packet switching and guaranteed quality of service |
| 01/16/1996 | US5485370 Home services delivery system with intelligent terminal emulator |
| 01/11/1996 | WO1996000976A1 Processor that indicates system bus ownership in an upgradable multiprocessor computer system |
| 01/11/1996 | WO1996000946A1 Data pre-fetch for script-based multimedia systems |
| 01/11/1996 | WO1996000940A1 Pci to isa interrupt protocol converter and selection mechanism |
| 01/11/1996 | DE4421229A1 Access to data held in common memory by multiprocessor system |
| 01/11/1996 | CA2194154A1 Data pre-fetch for script-based multimedia systems |
| 01/10/1996 | EP0691794A2 Switching device with DMA control |
| 01/10/1996 | EP0691782A2 Method and apparatus for enhancing capabilities of office machines |
| 01/10/1996 | EP0691780A2 Multimedia conferencing system |
| 01/10/1996 | EP0691619A2 System for accessing and distributing electronic documents |
| 01/10/1996 | EP0691618A1 Integrated Processor |
| 01/10/1996 | EP0691617A2 Directional asymmetric signal swing bus system for circuit module architecture |
| 01/10/1996 | EP0691616A1 RAM and ROM control unit |
| 01/10/1996 | EP0691061A1 Method and system for managing telecommunications such as telephone calls |
| 01/10/1996 | EP0691056A1 Generic managed object model for lan domain |
| 01/10/1996 | EP0635192A4 Circuit board connections. |
| 01/10/1996 | EP0626083A4 An isdn audiovisual teleservices interface subsystem. |
| 01/10/1996 | CN1114802A Signal transmitting device suitable for fast signal transmission |
| 01/10/1996 | CN1114762A Drawing data producing apparatus and drawing data producing method |
| 01/09/1996 | US5483660 Method and apparatus for performing multiplexed and non-multiplexed bus cycles in a data processing system |
| 01/09/1996 | US5483656 System for managing power consumption of devices coupled to a common bus |
| 01/09/1996 | US5483645 Cache access system for multiple requestors providing independent access to the cache arrays |
| 01/09/1996 | US5483642 Bus system for use with information processing apparatus |
| 01/09/1996 | US5483553 Serial data transfer apparatus |
| 01/09/1996 | US5483533 Traffic control system of local area network |
| 01/09/1996 | US5483530 System and method for communicating with digital and analog devices via a single digital interface |
| 01/09/1996 | US5483518 Addressable shadow port and protocol for serial bus networks |
| 01/09/1996 | US5483466 Client/server system and mail reception/display control method |
| 01/09/1996 | US5483419 Hot-swappable multi-cartridge docking module |
| 01/09/1996 | US5483352 Computer able to link electronic mail functions with telephone functions |
| 01/09/1996 | US5483239 Direct memory access (DMA) sampler |
| 01/09/1996 | US5483184 Programmable CMOS bus and transmission line receiver |
| 01/04/1996 | WO1996000476A1 Method of controlling, by pc-fax link, a phone linked to a fax machine |
| 01/04/1996 | WO1996000420A1 Memory device with switching of data stream modes |
| 01/04/1996 | DE4422465A1 Computer connection cable with integrated interface |
| 01/04/1996 | DE4422343A1 Steuerung eines an ein Fax-Gerät angeschlossenen Fernsprechendgerätes mittels einer PC-Fax-Kopplung Control a device connected to a fax machine telephone terminal by means of a PC-fax link |
| 01/04/1996 | DE19519944A1 Kommunikationsschaltung Communication circuit |
| 01/03/1996 | EP0690626A2 System for storage and playback of segmented video data |
| 01/03/1996 | EP0690599A2 Application programming interface for distributed processing in networks |
| 01/03/1996 | EP0690430A2 Single chip frame buffer and graphics accelerator |
| 01/03/1996 | EP0690389A1 Information recording mediums and electronic apparatus which use the information recording mediums |
| 01/03/1996 | EP0690388A2 Multiple protocol device interface |
| 01/03/1996 | EP0690387A1 Early arbitration |
| 01/03/1996 | EP0690382A2 Computer system with a multiplexed address bus and pipelined write operations |
| 01/03/1996 | EP0690370A2 Microprocessor device and peripherals |
| 01/03/1996 | EP0689752A1 Isdn adapter board |
| 01/03/1996 | EP0689696A1 System for reverse address resolution for remote network device |
| 01/03/1996 | EP0592551B1 Press roll for a papermachine |
| 01/03/1996 | CN1114489A Pipeline |
| 01/02/1996 | US5481756 DMA controller mailing auto-initialize halting unit |
| 01/02/1996 | US5481755 Apparatus and method for addressing multiple adapter cards in one operation by distributing bits of registers across the adapter cards |
| 01/02/1996 | US5481754 Apparatus and method for bios interface to features in multiple adapter cards in one operation using registers with bits distributed across the adapter cards |
| 01/02/1996 | US5481753 I/O device having identification register and data register where identification register indicates output from the data register to be an identifier or normal data |
| 01/02/1996 | US5481738 Apparatus and method for communicating a quiesce and unquiesce state between elements of a data processing complex |
| 01/02/1996 | US5481731 Method and apparatus for invalidating a cache while in a low power state |
| 01/02/1996 | US5481729 Interrupt controller that reduces the number of scans needed to identify priority |
| 01/02/1996 | US5481728 Data processor having circuitry for high speed clearing of an interrupt vector register corresponding to a selected interrupt request |
| 01/02/1996 | US5481726 Information processing system having a plurality of processors |
| 01/02/1996 | US5481725 Method for providing programmable interrupts for embedded hardware used with programmable interrupt controllers |
| 01/02/1996 | US5481724 Peer to peer computer-interrupt handling |
| 01/02/1996 | US5481707 Dedicated processor for task I/O and memory management |
| 01/02/1996 | US5481687 Method for reducing the number of bits in a binary word representing a series of addresses |
| 01/02/1996 | US5481681 Data transfer operations between two asynchronous buses |
| 01/02/1996 | US5481680 Dynamically programmable bus arbiter with provisions for historical feedback and error detection and correction |
| 01/02/1996 | US5481679 Data processing apparatus having bus switches for selectively connecting buses to improve data throughput |
| 01/02/1996 | US5481678 Data processor including selection mechanism for coupling internal and external request signals to interrupt and DMA controllers |
| 01/02/1996 | US5481677 Data transfer system in which data is transferred to or from a data memory during an instruction fetch cycle |
| 01/02/1996 | US5481676 Arrangement for the decentralized control of access to a bus by units connected to the bus |
| 01/02/1996 | US5481675 Asynchronous serial communication system for delaying with software dwell time a receiving computer's acknowledgement in order for the transmitting computer to see the acknowledgement |
| 01/02/1996 | US5481674 Computer-implemented method |
| 01/02/1996 | US5481604 Telecommunication network and searching arrangement for finding the path of least cost |
| 01/02/1996 | CA2065991C Personal computer data transfer control |
| 01/02/1996 | CA2021832C Apparatus and method for improving the communication efficiency between a host processor and peripheral devices connected by an scsi bus |
| 01/02/1996 | CA2018073C Apparatus and method for assigning address to scsi supported peripheral devices |
| 01/02/1996 | CA2018065C Data processing system with means to convert burst operations into pipelined operations |
| 01/02/1996 | CA2015214C Computer system high speed link method and link and means |
| 12/31/1995 | CA2150062A1 Applications programming interface for distributed processing in networks |
| 12/28/1995 | WO1995035572A1 Graphics controller integrated circuit without memory interface |
| 12/28/1995 | WO1995035540A1 Dynamic processor performance and power management in a computer system |